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CD74ACT86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

FEATURES ·ControlledBaseline –OneAssembly/TestSite,OneFabrication Site ·ExtendedTemperaturePerformanceof –55°Cto125°C ·EnhancedDiminishingManufacturing Sources(DMS)Support ·EnhancedProduct-ChangeNotification ·QualificationPedigree(1) ·InputsAreTTL-VoltageCompa

CD74ACT86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,

CD74ACT86

具有 TTL 兼容型 CMOS 輸入的 4 通道、2 輸入、4.5V 至 5.5V XOR（異或）門; ? Inputs Are TTL-Voltage Compatible\n? Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n? Balanced Propagation Delays\n? ±24-mA Output Drive Current \n? Fanout to 15 F Devices\n \n? SCR-Latchup-Resistant CMOS Process and Circuit Design\n? Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015;

The ?ACT86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function Y = AB or Y = A\\B + AB\\ in positive logic.\n\n A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

CD74ACT86

Quad 2-Input Exclusive-OR Gate

CD74ACT86E

Package：PDIP；QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,

CD74ACT86E.A

Package：PDIP；QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,

CD74ACT86-EP

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

FEATURES ·ControlledBaseline –OneAssembly/TestSite,OneFabrication Site ·ExtendedTemperaturePerformanceof –55°Cto125°C ·EnhancedDiminishingManufacturing Sources(DMS)Support ·EnhancedProduct-ChangeNotification ·QualificationPedigree(1) ·InputsAreTTL-VoltageCompa

CD74ACT86-EP

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,

CD74ACT86-EP

具有 TTL 兼容型 CMOS 輸入的增強(qiáng)型產(chǎn)品 4 通道、2 輸入、4.5V 至 5.5V XOR（異或）門; ? Controlled Baseline \n? One Assembly/Test Site, One Fabrication Site\n \n? Extended Temperature Performance of -55°C to 125°C\n? Enhanced Diminishing Manufacturing Sources (DMS) Support\n? Enhanced Product-Change Notification\n? Qualification Pedigree\n? Inputs Are TTL-Voltage Compatible\n? Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n? Balanced Propagation Delays\n? ±24-mA Output Drive Current \n? Fanout to 15 F Devices\n \n? SCR-Latchup-Resistant CMOS Process and Circuit Design\n? Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015\n \nComponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.;

The CD74ACT86-EP is a quadruple 2-input exclusive-OR gate. This device performs the Boolean function Y = AB or Y = AB + AB in positive logic. A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

CD74ACT86M

Package：SOIC；QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883,