CD74ACT74QM96Q1屬于集成電路（IC）的觸發(fā)器。由美國德州儀器公司制造生產(chǎn)的CD74ACT74QM96Q1觸發(fā)器觸發(fā)器是能夠存儲單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個(gè)輸入；一個(gè)或多個(gè)用于傳遞要存儲的數(shù)據(jù)，另一個(gè)用于指示存儲該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對提供給其輸入的信號有不同的響應(yīng)，可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號時(shí)才會(huì)改變。

Qualified for Automotive Applications

Inputs Are TTL-Voltage Compatible

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Balanced Propagation Delays

±24-mA Output Drive Current

? Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

description/ordering information

The CD74ACT74 dual positive-edge-triggered device is a D-type flip-flop.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the

other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time

requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs

at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,

data at the D input can be changed without affecting the levels at the outputs.