CD74ACT139M屬于集成電路（IC）的信號(hào)開(kāi)關(guān)多路復(fù)用器解碼器。由美國(guó)德州儀器公司制造生產(chǎn)的CD74ACT139M信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器邏輯型信號(hào)開(kāi)關(guān)、多路復(fù)用器和編碼器 IC 可用于對(duì)以數(shù)字格式表示數(shù)據(jù)的電信號(hào)進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號(hào)的類似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無(wú)窮變化量。

AC Types Feature 1.5-V to 5.5-V Operation

and Balanced Noise Immunity at 30% of the

Supply Voltage

Buffered Inputs

Incorporate Two Enable Inputs to Simplify

Cascading and/or Data Reception

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description/ordering information

The ’ACT139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 4.5-V to 5.5-V VCC

operation. These devices are designed to be used in high-performance memory-decoding or data-routing

applications requiring very short propagation delay times. In high-performance memory systems, these

decoders can be used to minimize the effects of system decoding. When used with high-speed memories

utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are

less than the typical access time of the memory. This means that the effective system delay introduced by the

decoders is negligible.

The active-low enable (G) input can be used as a data line in demultiplexing applications. These

decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its

driving circuit.