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CD4572UB

CMOS 十六進制門（具有4 個反相器、一個 2 輸入或非門和一個 2 輸入與非門）; ? Pin 7 NOR input positioned adjacent to VSS for easy use of gate as an inverter\n? Pin 15 NAND input positioned adjacent to VDD for easy use of gate as an inverter\n? Standard symmetrical output characteristics\n? 100% tested for quiescent current at 20 V\n? Maximum input current of 1 μA at 18 V over full package-temperature range: ???100 nA at 18 V and 25°C\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of 'B' Series CMOS Devices\";

CD4572UB Hex Gate provides the system designer with direct implementation of inverter, NAND, and NOR functions and supplements the existing family of CMOS gates.\n\n The CD4572UB devices meet all requirements of JEDEC Standard No. 13B, \"Standard Specifications for Description of 'B' Series CMOS Devices.\"\n\n The CD4572UB types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages(M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4572UB

CMOS HEX GATE

CD4572UBE

CMOS Hex Gate

CD4572UBEE4

CMOS Hex Gate

CD4572UBM

CMOS Hex Gate

CD4572UBME4

CMOS Hex Gate

CD4572UBMG4

CMOS Hex Gate

CD4572UBMT

CMOS Hex Gate

CD4572UBMTE4

CMOS Hex Gate

CD4572UBMTG4

CMOS Hex Gate