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CD4536B

CMOS 可編程計時器; ? 24 flip-flop stages - - counts from 20 to 224\n? Last 16 stages selectable by BCD select code\n? Bypass input allows bypassing first 8 stages\n? On-chip RC oscillator provision\n? Clock inhibit input\n? Schmitt-trigger in clock line permits operation with very long rise and fall times\n? On-chip monostable output provision\n? Typical fCL = 3 MHz at VDD = 10 V\n? Test mode allows fast test sequence\n? Set and reset inputs\n? Capable of driving two low power TTL loads, one lower-power Schottky load, or two HTL loads over the rated temperature range\n? Standardized, symmetrical output characteristics\n? 100% tested for quiescent current at 20 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS Devices\";

CD4536B is a programmable timer consisting of 24 ripple-binary counter stages. The salient feature of this device is its flexibility. The device can count from 1 to 224 or the first 8 stages can be bypassed to allow an output, selectable by a 4-bit code, from any one of the remaining 16 stages. It can be driven by an external clock or an RC oscillator that can be constructed using on-chip components. Input IN1 serves as either the external clock input or the input to the on-chip RC oscillator. OUT1 and OUT2 are connection terminals for the external RC components. In addition, an on-chip monostable circuit is provided to allow a variable pulse width output. Various timing functions can be achieved using combinations of these capabilities.\n\n A logic 1 on the 8-BYPASS input enables a bypass of the first 8 stages and makes stage 9 the first counter stage of the last 16 stages. Selection of 1 of 16 outputs is accomplished by the decoder and the BCD inputs A, B, C and D. MONO IN is the timing input for the on-chip monostable oscillator. Grounding of the MONO IN terminal through a resistor of 10K ohms or higher, disables the one-shot circuit and connects the decoder directly to the DECODE OUT terminal. A resistor to VDD and a capacitor to ground from the MONO IN terminal enables the one-shot circuit and control its pulse width.\n\n A fast test mode is enabled by a logic 1 on 8-BYPASS, SET, and RESET. This mode divides the 24-stage counter into three 8-stage sections to facilitate a fast test sequence.\n\n The CD4536B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix),16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (DW, DWR, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4536B

CMOS PROGRAMMABLE TIMER

CD4536B

CMOS Programmable Timer

CD4536B-MIL

CMOS 可編程計時器; ? 24 flip-flop stages - - counts from 20 to 224\n? Last 16 stages selectable by BCD select code\n? Bypass input allows bypassing first 8 stages\n? On-chip RC oscillator provision\n? Clock inhibit input\n? Schmitt-trigger in clock line permits operation with very long rise and fall times\n? On-chip monostable output provision\n? Typical fCL = 3 MHz at VDD = 10 V\n? Test mode allows fast test sequence\n? Set and reset inputs\n? Capable of driving two low power TTL loads, one lower-power Schottky load, or two HTL loads over the rated temperature range\n? Standardized, symmetrical output characteristics\n? 100% tested for quiescent current at 20 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS Devices\";

CD4536B is a programmable timer consisting of 24 ripple-binary counter stages. The salient feature of this device is its flexibility. The device can count from 1 to 224 or the first 8 stages can be bypassed to allow an output, selectable by a 4-bit code, from any one of the remaining 16 stages. It can be driven by an external clock or an RC oscillator that can be constructed using on-chip components. Input IN1 serves as either the external clock input or the input to the on-chip RC oscillator. OUT1 and OUT2 are connection terminals for the external RC components. In addition, an on-chip monostable circuit is provided to allow a variable pulse width output. Various timing functions can be achieved using combinations of these capabilities.\n\n A logic 1 on the 8-BYPASS input enables a bypass of the first 8 stages and makes stage 9 the first counter stage of the last 16 stages. Selection of 1 of 16 outputs is accomplished by the decoder and the BCD inputs A, B, C and D. MONO IN is the timing input for the on-chip monostable oscillator. Grounding of the MONO IN terminal through a resistor of 10K ohms or higher, disables the one-shot circuit and connects the decoder directly to the DECODE OUT terminal. A resistor to VDD and a capacitor to ground from the MONO IN terminal enables the one-shot circuit and control its pulse width.\n\n A fast test mode is enabled by a logic 1 on 8-BYPASS, SET, and RESET. This mode divides the 24-stage counter into three 8-stage sections to facilitate a fast test sequence.\n\n The CD4536B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix),16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (DW, DWR, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4536BMS

CMOS Programmable Timer

Description CD4536BMSisaprogrammabletimerconsistingof24ripplebinarycounterstages.Thesalientfeatureofthisdeviceisitsflexibility. ??? Features ?HighVoltageType(20VRating) ?24Flip-FlopStage-Countsfrom20to224 ?Last16StagesSelectablebyBCDSelectCode ?Byp

CD4536B_13

CMOS Programmable Timer

CD4536B_15

CMOS Programmable Timer

CD4536BDW

CMOS Programmable Timer

CD4536BDW

CMOS Programmable Timer

CD4536BDW

CMOS Programmable Timer