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絲?。?a target="_blank" title="Marking" href="/cd4522bm/marking.html">CD4522BM；Package：SOIC；CMOS Programmable BCD Divide-by-“N” Counter

Features: ? Internally synchronous for high inter- nal and external speeds. ? Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ? 100% tested for quiescent current at 20-V. B? 5-V, 10-V, and 15-V parametric ratings. ? Standar

文件：634.52 Kbytes 頁數(shù)：16 Pages

TI2

德州儀器

CMOS Programmable BCD Divide-by-N Counter

文件：527.2 Kbytes 頁數(shù)：15 Pages

TI1

德州儀器

CMOS Programmable BCD Divide-by-“N” Counter

Features: ? Internally synchronous for high inter- nal and external speeds. ? Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ? 100% tested for quiescent current at 20-V. B? 5-V, 10-V, and 15-V parametric ratings. ? Standar

文件：634.52 Kbytes 頁數(shù)：16 Pages

TI2

德州儀器

CMOS Programmable BCD Divide-by-“N” Counter

Features: ? Internally synchronous for high inter- nal and external speeds. ? Logic edge-clocked design — incre- ments on positive Clock transition or on negative Clock Inhibit transition. ? 100% tested for quiescent current at 20-V. B? 5-V, 10-V, and 15-V parametric ratings. ? Standar

文件：634.52 Kbytes 頁數(shù)：16 Pages

TI2

德州儀器

TI 德州儀器
SOP8

TI 德州儀器

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