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CD4018B數(shù)據(jù)手冊(cè)集成電路(IC)的計(jì)數(shù)器除法器規(guī)格書PDF

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廠商型號(hào)

CD4018B

參數(shù)屬性

CD4018B 封裝/外殼為16-SOIC(0.154",3.90mm 寬);包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類別為集成電路(IC)的計(jì)數(shù)器除法器;產(chǎn)品描述:IC DIV-BY-N COUNTR PRESET 16SOIC

功能描述

CMOS 可預(yù)置 N 分頻計(jì)數(shù)器

封裝外殼

16-SOIC(0.154",3.90mm 寬)

制造商

TI Texas Instruments

中文名稱

德州儀器 美國德州儀器公司

數(shù)據(jù)手冊(cè)

下載地址下載地址二

更新時(shí)間

2025-8-17 22:58:00

人工找貨

CD4018B價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

CD4018B規(guī)格書詳情

描述 Description

CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\\5, Q\\4, Q\\3, Q\\2, Q\\1 signals, respectively, back to the DATA input. Divide-by-9, 7, 5, or 3 counter configurations can be implemented by the use of a CD4011B to gate the feedback connection to the DATA input. Divide-by functions grater than 10 can be achieved by use of multiple CD4018B units. The counter is advanced one count at the positive clock-signal transition.. Schmitt Trigger action on the clock line permits unlimited clock rise and fall times. A high RESET signal clear the counter to an all-zero condition. A high PRESET-ENABLE signal allows information on the JAM inputs to preset the counter. Anti-lock gating is provided to assure the proper counting sequence.

The CD4018B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix),16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes),and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

特性 Features

? Medium speed operation……10 MHz (typ.) at VDD – VSS = 10 V
? Fully static operation
? 100% tested for quiescent current at 20 V
? Standardized, symmetrical output characteristics
? 5-V, 10-V, and 15-V parametric ratings
? Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
? Noise margin (full package-temperature range) = ????????1 V at VDD = 5 V ????????2 V at VDD = 10 V ?????2.5 V at VDD = 15 V
? Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS Devices\"
? Applications:
? Fixed and programmable divide-by-10, 9, 8, 7, 6, 5, 4, 3, 2 counters
? Fixed and programmable counters greater than 10
? Programmable decade counters
? Divide-by-\"N\" counters/frequency synthesizers
? Frequency division
? Counter control/timers

技術(shù)參數(shù)

  • 制造商編號(hào)

    :CD4018B

  • 生產(chǎn)廠家

    :TI

  • Bits (#)

    :5

  • Technology Family

    :CD4000

  • Supply voltage (Min) (V)

    :3

  • Supply voltage (Max) (V)

    :18

  • Input type

    :Standard CMOS

  • Output type

    :Push-Pull

  • Features

    :Balanced outputs

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
HARRIS
2016+
DIP
3000
只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
詢價(jià)
HARRIS
1725+
DIP16
3256
科恒偉業(yè)!只做原裝正品,假一賠十!
詢價(jià)
TI
25+23+
DIP
28981
絕對(duì)原裝正品全新進(jìn)口深圳現(xiàn)貨
詢價(jià)
TI
24+
PDIP|16
71000
免費(fèi)送樣原盒原包現(xiàn)貨一手渠道聯(lián)系
詢價(jià)
TI
24+
DIP
5000
TI一級(jí)代理商原裝進(jìn)口現(xiàn)貨
詢價(jià)
HAR
24+
13
詢價(jià)
TI/德州儀器
23+
16-SOIC
4132
原裝正品代理渠道價(jià)格優(yōu)勢(shì)
詢價(jià)
N/A
17+
NEW
6200
100%原裝正品現(xiàn)貨
詢價(jià)
-
25+
-
12588
原裝正品
詢價(jià)
TI
23+
DIP陶瓷
5000
原裝正品,假一罰十
詢價(jià)