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CD40161B

具有異步清零功能的 CMOS 同步可編程 4 位二進制計數(shù)器; ? Internal look-ahead for fast counting\n? Carry output for cascading\n? Synchronously programmable\n? Clear asynchronous input (CD40160B, CD40161B)\n? Clear synchronous input (CD40162B, CD40163B)\n? Synchronous load control input\n? Low-power TTL compatibility\n? Standardized, symmetrical output characteristics\n? 100% tested for quiescent current at 20 V\n? Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n? Noise margin (full package temperature range): \n - 1 V at VDD = 5 V\n? 2 V at VDD = 10 V\n? 2.5 V at VDD = 15 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of 'B' Series CMOS Devices\"\n? Applications \n - Programmable binary and decade counting\n? Counter control/timers\n? Frequency dividing\nData sheet acquired from Harris Semiconductor CD40160B - Decade with Asynchronous Clear CD40161B - Binary with Asynchronous Clear CD40162B - Decade with Synchronous Clear CD40163B - Binary with Synchronous Clear CD40160B, CD40162B, and CD40163B were not acquired from Harris Semiconductor.;

CD40160B, CD40161B, CD40162B, and CD40163B are 4-bit synchronous programmable counters. The CLEAR function of the CD40162B and CD40163B is synchronous and a low level at the CLEAR\\ input sets all four outputs low on the next positive CLOCK edge. The CLEAR function of the CD40160B and CD40161B is asynchronous and a low level at the CLEAR\\ input sets all four outputs low regardless of the state of the CLOCK, LOAD\\, or ENABLE inputs. A low level at the LOAD\\ input disables the counter and causes the output to agree with the setup data after the next CLOCK pulse regardless of the conditions of the ENABLE inputs.\n The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a carry output (COUT). Counting is enabled when both PE and TE inputs are high. The TE input is fed forward to enable COUT. This enabled output produces a positive output pulse with a duration approximately equal to the positive portion of the Q1 output. This positive overflow carry pulse can be used to enable successive cascaded stages. Logic transitions at the PE or TE inputs may occur when the clock is either high or low.\n The CD40160B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix). The CD40161B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).\nThe CD40160B through CD40163B types are functionally equivalent to and pin-compatible with the TTL counter series 74LS160 through 74LS163 respectively.\n \n

TITexas Instruments

德州儀器美國德州儀器公司

CD40161B

Decade Counter with Asynchronous Clear

NSCNational Semiconductor (TI)

美國國家半導(dǎo)體美國國家半導(dǎo)體公司

CD40161B

CMOS Synchronous Programmable 4-Bit Counters

TITexas Instruments

德州儀器美國德州儀器公司

CD40161B-MIL

具有異步清零功能的 CMOS 同步可編程 4 位二進制計數(shù)器; ? Internal look-ahead for fast counting\n? Carry output for cascading\n? Synchronously programmable\n? Clear asynchronous input (CD40160B, CD40161B)\n? Clear synchronous input (CD40162B, CD40163B)\n? Synchronous load control input\n? Low-power TTL compatibility\n? Standardized, symmetrical output characteristics\n? 100% tested for quiescent current at 20 V\n? Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n? Noise margin (full package temperature range): \n - 1 V at VDD = 5 V\n? 2 V at VDD = 10 V\n? 2.5 V at VDD = 15 V\n? 5-V, 10-V, and 15-V parametric ratings\n? Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of 'B' Series CMOS Devices\"\n? Applications \n - Programmable binary and decade counting\n? Counter control/timers\n? Frequency dividing\nData sheet acquired from Harris Semiconductor CD40160B - Decade with Asynchronous Clear CD40161B - Binary with Asynchronous Clear CD40162B - Decade with Synchronous Clear CD40163B - Binary with Synchronous Clear CD40160B, CD40162B, and CD40163B were not acquired from Harris Semiconductor.;

CD40160B, CD40161B, CD40162B, and CD40163B are 4-bit synchronous programmable counters. The CLEAR function of the CD40162B and CD40163B is synchronous and a low level at the CLEAR\\ input sets all four outputs low on the next positive CLOCK edge. The CLEAR function of the CD40160B and CD40161B is asynchronous and a low level at the CLEAR\\ input sets all four outputs low regardless of the state of the CLOCK, LOAD\\, or ENABLE inputs. A low level at the LOAD\\ input disables the counter and causes the output to agree with the setup data after the next CLOCK pulse regardless of the conditions of the ENABLE inputs.\n The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a carry output (COUT). Counting is enabled when both PE and TE inputs are high. The TE input is fed forward to enable COUT. This enabled output produces a positive output pulse with a duration approximately equal to the positive portion of the Q1 output. This positive overflow carry pulse can be used to enable successive cascaded stages. Logic transitions at the PE or TE inputs may occur when the clock is either high or low.\n The CD40160B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix). The CD40161B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).\nThe CD40160B through CD40163B types are functionally equivalent to and pin-compatible with the TTL counter series 74LS160 through 74LS163 respectively.\n \n

TITexas Instruments

德州儀器美國德州儀器公司

CD40161BMS

CMOS Synchronous Programmable 4-Bit Counters

CMOSSynchronousProgrammable4-BitCounters CD40160BMS,CD40161BMS,CD40162BMSandCD40163BMSare4-bitsynchronousprogrammablecounters.TheCLEARfunctionoftheCD40162BMSandCD40163BMSissynchronousandalowlevelattheCLEARinputsetsallfouroutputslowonthenextpositiveCLOCK

Intersil

Intersil Corporation

CD40161BC

Decade Counter with Asynchronous Clear

NSCNational Semiconductor (TI)

美國國家半導(dǎo)體美國國家半導(dǎo)體公司

CD40161BCJ

Decade Counter with Asynchronous Clear

NSCNational Semiconductor (TI)

美國國家半導(dǎo)體美國國家半導(dǎo)體公司

CD40161BCN

Decade Counter with Asynchronous Clear

NSCNational Semiconductor (TI)

美國國家半導(dǎo)體美國國家半導(dǎo)體公司

CD40161BE

CMOS Synchronous Programmable 4-Bit Counters

TITexas Instruments

德州儀器美國德州儀器公司

CD40161BE

CMOS Synchronous Programmable 4-Bit Counters

TI1Texas Instruments

德州儀器美國德州儀器公司

技術(shù)參數(shù)

  • VCC(Min)(V):

    3

  • VCC(Max)(V):

    18

  • Bits(#):

    4

  • Voltage(Nom)(V):

    51015

  • F @ nom voltage(Max)(MHz):

    8

  • ICC @ nom voltage(Max)(mA):

    0.03

  • tpd @ nom Voltage(Max)(ns):

    160

  • IOL(Max)(mA):

    1.5

  • IOH(Max)(mA):

    -1.5

  • Function:

    Counter

  • Type:

    Binary

  • Rating:

    Catalog

  • Operating temperature range(C):

    -55 to 125

  • Package Group:

    PDIP

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更多CD40161B供應(yīng)商 更新時間2025-7-28 17:06:00