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CD4006BC

18-Stage Static Shift Register

CD4006BC

18-Stage Static Shift Register;

CD4006BCJ

18-Stage Static Shift Register; ■ Wide supply voltage range 3.0V to 15V\n■ High noise immunity 0.45 VDD (typ.)\n■ Low power TTL fan out of 2 driving 74L\n?? compatibility or 1 driving 74LS\n■ Low clock input capacitance 6 pF (typ.)\n■ Medium speed 10 MHz (typ.) (with VDD e 10V)\n■ Low power\n■ Fully static operation;

General Description\nThe CD4006BM/CD4006BC 18-stage static shift register is comprised of four separate shift register sections, two sections of four stages and two sections of five stages. Each section has an independent data input. Outputs are available at the fourth stage and the fifth stage of each section. A common clock signal is used for all stages. Data is shifted to the next stage on the negative-going transition of the clock. Through appropriate connections of inputs and outputs, multiple register sections of 4, 5, 8, and 9 stages, or single register sections of 10, 12, 13, 14, 16, 17, and 18 stages can be implemented using one package.

CD4006BCN

(N) 18 STAGE SHIFT REGISTER;

CD4006BCN

Package：14-DIP（0.300"，7.62mm）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 功能：- 類別：集成電路（IC） 移位寄存器 描述：(N) 18 STAGE SHIFT REGISTER

CD4006BE

CMOS18-StageStaticShiftRegister

CD4006BM

18-StageStaticShiftRegister

CD4006B-MIL

CMOS18-StageStaticShiftRegister

CD4006B-MIL

CMOS18-StageStaticShiftRegister

Features: =Fullystoperation =Shiftingratesupto12MHz@10V(typ) Pormanontregisterstoragewithclockfinehighorlow— noinformationrecirculationrequired =100%testedforquiescentcurrentat20V =Standardized,symmetricaloutputcharacteristics #5V,10-V,and16-Vpar

CD4006BMS

CMOS18-StageStaticRegister

Description CD4006BMStypesarecomposedof4separateshiftregistersections:twosectionsoffourstagesandtwosectionsoffivestageswithanoutputtapatthefourthstage.Eachsectionhasanindependentsingle-raildatapath. Acommonclocksignalisusedforallstages.Dataareshifte