AV16841DL中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書
AV16841DL規(guī)格書詳情
DESCRIPTION
The 74ALVT16841 Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V.
FEATURES
? High speed parallel latches
? 5V I/O Compatible
? Live insertion/extraction permitted
? Extra data width for wide address/data paths or buses carrying parity
? Power-up 3-State
? Power-up reset
? Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
? Output capability: +64mA/–32mA
? Latch-up protection exceeds 500mA per Jedec Std 17
? Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
? ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
| 供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
24+ |
N/A |
52000 |
一級代理-主營優(yōu)勢-實惠價格-不悔選擇 |
詢價 | |||
STACKPOLE |
15+Rohs |
SMD |
389800 |
一級質(zhì)量保證長期穩(wěn)定提供貨優(yōu)價美 |
詢價 | ||
STACKPOLE |
23+ |
SMD |
389800 |
原廠授權(quán)代理,海外優(yōu)勢訂貨渠道?？商峁┐罅繋齑?詳 |
詢價 | ||
BOURNS |
24+ |
con |
352055 |
優(yōu)勢庫存,原裝正品 |
詢價 | ||
BOURNS/伯恩斯 |
25+ |
SMD |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價 | ||
BOURNS |
24+ |
0805 |
7350 |
現(xiàn)貨供應,當天可交貨!免費送樣,原廠技術(shù)支持!!! |
詢價 |
