描述 Description

NOTE: ATSAMD21J15A is not recommended for new designs, please use ATSAMD21J15B.A low-power, high-performance Microchip's ARM? Cortex?-M0+ based flash microcontroller, the ATSAMD21J15 is ideal for a wide range of home automation, consumer, metering, and industrial applications. It features:32KB of flash and 4KB of SRAMUp to 48MHz operating frequencySix serial communication modules (SERCOM) configurable as UART/USART, SPI or I2C, five 16-bit timer/counters, 32-bit Real-Time Clock and calendar, 24 PWM channels, one 20-channel 12-bit ADC, one 10-bit DACFull Speed USB Device and embedded HostSupport for up to 256 touch channels1.62V to 3.63V power supplyEasy pin migration to SAMD21G and SAMD21J devicesSupported by MPLAB X IDE and MPLAB Harmony.Functional SafetyThis device supports the ISO 26262 (ASIL B), IEC 61508 (SIL 2) and?IEC 60730 (Class B) functional safety standards.??·???The Functional Safety Manual, FMEDA and information on the Diagnostic Software are available under NDA through the request form on the?32-bit Microcontrollers Functional Safety?web page.·???To request any information about the SIL 2 STL, please fill out and submit the request form on?Industrial Safety?Self-Test Library?web page.·??Learn more about??32-bit MCUs with Functional Safety?capabilities?including device hardware and certified software libraries.

特性 Features

? Single-cycle hardware multiplier
? Micro Trace Buffer
? 32KB in-system self-programmable Flash
? 4KB SRAM Memory
? Power-on reset (POR) and brown-out detection (BOD)
? Internal and external clock options with 48MHDigital Frequency Locked Loop (DFLL48M) and 48MHto 96MHFractional
? External Interrupt Controller (EIC)
? 16 external interrupts
? One non-maskable interrupt
? Two-pin Serial Wire Debug (SWD) programming, test and debugging interface
? Drop in compatible with SAM D20
? Idle and standby sleep modes
? SleepWalking peripherals
? 12-channel Direct Memory Access Controller (DMAC)
? 12-channel Event System
? One 16-bit TC with compare/capture channels
? One 8-bit TC with compare/capture channels
? One 32-bit TC with compare/capture channels, by using two TCs
? Up to four compare channels with optional complementary output
? Generation of synchronized pulse width modulation (PWM) pattern across port pins
? Deterministic fault protection, fast decay and configurable dead-time between complementary output
? Dithering that increase resolution with up to 5 bit and reduce quantization error
? 32-bit Real Time Counter (RTC) with clock/calendar function
? Watchdog Timer (WDT)
? CRC-32 generator
? Embedded device function
? Eight endpoints
? USART with full-duplex and single-wire half-duplex configuration
? I2C Bus up to 3.4MHz
? SMBUS/PMBUS
? SPI
? LIN client
? Differential and single-ended input
? 1/2x to 16x programmable gain stage
? Automatic offset and gain error compensation
? Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
? 10-bit, 350ksps Digital-to-Analog Converter (DAC)
? Two Analog Comparators (AC) with window compare function
? 256-channel capacitive touch and proximity sensing
? 52 GPIO pins
? 64-pin TQFP, QFN, UFBGA
? 1.62V – 3.63V