特性 Features

* Built-in re-timers

— Integrated re-timers for USB3.2 up to Gen 2 @ 10Gbps

— Supports both Separate Reference Clock Independent SSC (SRIS) and Bit-Level Re-timer (BLR) Architectures of USB3.2 Specification (Appendix-E)

— Integrated re-timers (Link training-tunable PHY repeater) for DisplayPort up to HBR3 @ 8.1Gbps, Supports both transparent mode and non-transparent mode (transparent or LTTPR)

— Supports both host (source) and device (sink) applications in USB-C subsystems

— Loss compensation to recover up to 2308 channel loss (USB), up to 27dB (DP)

* Integrated mux

— Integrated (6x4) mux switches USB and DP signals and preserves enhanced signal output over USB-C connector

— Mux control input through 12C commands from external 12C master (or, optionally through GPIO of FLIP/USB_EN/DP_EN pins)

— Integrated SBU/AUX mux for switching DisplayPort AUX +/- signals

* Integrated reference clock

* Serial control interfaces

- I2CSlave interface, up 10 IMHz, for mux and re-timer configuration

* Industry standard compatibility

— USB3.2 specification, Appendix E

— DisplayPort 1.4a specification

— USB Type-C r1.2 specification

— Intel USB3.2 Repeater and Active Switch specification

* Low-power design

- Analog power supply at 1.8V

- 1/0 power supply at 1.8V

- Core power supply at 1.2V

* Package

— QFN-60, 6.4mm x 6.4mm, 0.90mm Z-height, 0.35mm pin-pitch

* Commercial temperature range of 0C 10 70C

Applications

Notebooks, desktops, docking