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首頁(yè)>AM29F800BT-90DWC>規(guī)格書(shū)詳情

AM29F800BT-90DWC中文資料超威半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

AM29F800BT-90DWC
廠(chǎng)商型號(hào)

AM29F800BT-90DWC

功能描述

8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory-Die Revision 1

文件大小

207.15 Kbytes

頁(yè)面數(shù)量

9 頁(yè)

生產(chǎn)廠(chǎng)商 Advanced Micro Devices
企業(yè)簡(jiǎn)稱(chēng)

AMD超威半導(dǎo)體

中文名稱(chēng)

美國(guó)超威半導(dǎo)體公司官網(wǎng)

原廠(chǎng)標(biāo)識(shí)
AMD
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠(chǎng)下載

更新時(shí)間

2025-8-2 23:00:00

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AM29F800BT-90DWC規(guī)格書(shū)詳情

GENERAL DESCRIPTION

The Am29F800B in Known Good Die (KGD) form is a 8 Mbit, 5.0 volt-only Flash memory. AMD defines KGD as standard product in die form, tested for functionality and speed. AMD KGD products have the same reliability and quality as AMD products in packaged form.

DISTINCTIVE CHARACTERISTICS

■ Single power supply operation

— 5.0 Volt-only operation for read, erase, and program operations

— Minimizes system level requirements

■ Manufactured on 0.35 μm process technology

— Compatible with 0.5 μm Am29F800 device

■ High performance

— 90 or 120 ns access time

■ Low power consumption (typical values at 5 MHz)

— 1 μA standby mode current

— 20 mA read current (byte mode)

— 28 mA read current (word mode)

— 30 mA program/erase current

■ Flexible sector architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors (byte mode)

— One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword sectors (word mode)

— Supports full chip erase

— Sector Protection features:

A hardware method of locking a sector to prevent any program or erase operations within that sector

Sectors can be locked via programming equipment

Temporary Sector Unprotect feature allows code changes in previously locked sectors

■ Top or bottom boot block configurations available

■ Embedded Algorithms

— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

— Embedded Program algorithm automatically writes and verifies data at specified addresses

■ Minimum 1,000,000 write cycles per sector guaranteed

■ Compatibility with JEDEC standards

— Pinout and software compatible with single power-supply Flash

— Superior inadvertent write protection

■ Data# Polling and toggle bits

— Provides a software method of detecting program or erase operation completion

■ Ready/Busy# pin (RY/BY#)

— Provides a hardware method of detecting program or erase cycle completion

■ Erase Suspend/Erase Resume

— Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

■ Hardware reset pin (RESET#)

— Hardware method to reset the device to reading array data

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AMD
24+
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8200
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