描述 Description

The AiP74LVC74 is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nS(—)D) and (nR(—)D) inputs, and complementary nQ and nQ(—) outputs.The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

特性 Features

? Wide supply voltage range from 1.2V to 3.6V
? 5V tolerant inputs for interfacing with 5V logic
? CMOS low power consumption
? Direct interface with TTL levels
? Specified from -40℃ to +125℃
? Packaging information: DIP14/SOP14/TSSOP14

應(yīng)用 Application

? 家用電器
? 工業(yè)控制
? 新能源