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ADP7182

0.5 Ω RON, ±15 V, 12 V, ±5 V, 5 V/–12 V, Quad SPST Switch

FEATURES ?LowRON0.5Ω ?Highcontinuouscurrentofupto847mA ?FlatRONacrosssignalrange,0.003Ω ?THDof–122dBat1kHz ?Improvedbalancebetweenonresistanceandoncapacitance ?LowRON(0.5Ω)andCON(28pF) ?1.8V,3.3V,and5VLogiccompatibility ?16-lead,4mmx4

ADP7182

0.5 Ω RON, ±20 V, 36 V, Quad SPST Switch

FEATURES ?LowRON0.5Ω ?Highcontinuouscurrentofupto847mA ?FlatRONacrosssignalrange,0.003Ω ?THDof–127dBat1kHz ?Improvedbalancebetweenonresistanceandoncapacitance ?LowRON(0.5Ω)andCON(25pF) ?1.8V,3.3V,and5VLogiccompatibility ?16-lead,4mmx4

ADP7182

-28 V、 ?200 mA、,低噪聲、線性穩(wěn)壓器

ADP7182是一款CMOS、低壓差(LDO)線性穩(wěn)壓器，采用-2.7 V至-28 V電源供電，最大輸出電流為?200 mA。這款高輸入電壓LDO適用于調節(jié)-27 V至-1.2 V供電的高性能模擬和混合信號電路。該器件采用先進的專有架構，提供高電源抑制、低噪聲特性，僅需一個2.2 μF小型陶瓷輸出電容，便可實現(xiàn)出色的線路與負載瞬態(tài)響應性能。\n\n ADP7182提供固定輸出電壓選項和可調輸出型號，可通過外置反饋分壓器，將輸出電壓調節(jié)至-1.22 V至?VIN + VDO。 \n\n 現(xiàn)有庫存提供下列固定輸出電壓選項：?5 V (3 mm × 3 mm LFCSP)、?1.; ? 低噪聲：18 μV rms\n\n? 電源抑制比(PSRR)：66 dB（10 kHz，VOUT= ?3 V）\n\n? 正負使能邏輯\n\n? 使用小型2.2μF陶瓷輸出電容保持穩(wěn)定 \n\n? 輸入電壓范圍：-2.7 V至-28 V\n\n? 最大輸出電流：-200 mA\n\n? 低壓差：185 mV（在-200 mA負載下） \n\n? 初始精度：±1%\n\n? 線路、負載和溫度范圍內(nèi)的精度\n? +2%最大值/?3%最小值\n\n\n\n\n? 低靜態(tài)電流，IGND= ?650 μA（?200 mA負載）\n\n? 低關斷電流：?2 μA\n\n? 可調;

ADP7182

Positive or negative enable logic

ADP7182

??8 V, ??00 mA, Low Noise, Linear Regulator

ADP7182ACPZ-5.0-R7

Positive or negative enable logic

ADP7182ACPZ-5.0-R7

??8 V, ??00 mA, Low Noise, Linear Regulator

ADP7182ACPZN-1.2R7

Positive or negative enable logic

ADP7182ACPZN-1.5R7

Positive or negative enable logic

ADP7182ACPZN-2.5R7

Positive or negative enable logic