ADN4612屬于集成電路（IC）的信號開關(guān)多路復用器解碼器。由亞德諾半導體技術(shù)有限公司制造生產(chǎn)的ADN4612信號開關(guān)，多路復用器，解碼器邏輯型信號開關(guān)、多路復用器和編碼器 IC 可用于對以數(shù)字格式表示數(shù)據(jù)的電信號進行路由和選擇。這些器件與設計用于模擬信號的類似產(chǎn)品有所不同，它們保留的信息表示為兩個電狀態(tài)之一，而不是兩個外部界限內(nèi)的無窮變化量。

GENERAL DESCRIPTION

The ADN4612 is a 12 × 12 asynchronous, protocol agnostic, digital crosspoint switch with 12 differential PECL-/CML-compatible inputs and 12 differential CML outputs.

The ADN4612 is optimized for nonreturn-to-zero (NRZ) signaling with data rates of up to 11.3 Gbps per port. Each port provides programmable input equalization, loss of signal (LOS) detection, programmable output swing, and output preemphasis/deemphasis.

FEATURES

DC to 11.3 Gbps per port, NRZ data rate

Multitime constant, programmable receive equalization

Compensates 25 inches of FR408 at 10.3125 Gbps

Compensates 15 inches of FR408 at 11.3 Gbps

6-tap programmable transmit feedforward equalization (FFE)

Compensates 15 inches of FR408 at 10.3125 Gbps

Compensates 10 inches of FR408 at 11.3 Gbps

Low power

150 mW per channel at 2.5 V (outputs enabled)

12 × 12, fully differential, nonblocking array

Double rank connection programming

2-pin selectable connection maps

Per lane lost of signal (LOS) detection

Flexible output termination supply range (1.8 V to 3.3 V)

DC- or ac-coupled differential CML inputs and outputs

Programmable CML output levels

Load from EEPROM for automatic power-on ready operation

Per lane input and output P/N pair inversion for routing ease

50 Ω on-chip input/output termination

Supports 64-bit/66-bit, scrambled or not coded NRZ data up

to 11.3 Gbps

Serial (I2C or SPI slave) control interface

88-lead LFCSP, 12 mm × 12 mm, Pb-free package

?40°C to +85°C operating temperature range

APPLICATIONS

Fiber optic network switching

10 Gigabit Ethernet over backplane 10GBASE-KR 802.3ap

XLAUI/CAUI (802.3ba)

SONET OC-192/STM-64x

1×, 2×, 4×, 8×, and 10× Fibre Channel