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AD9515SLASHPCBZ中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
AD9515SLASHPCBZ |
功能描述 | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
文件大小 |
407.42 Kbytes |
頁面數(shù)量 |
28 頁 |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡稱 |
AD【亞德諾】 |
中文名稱 | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識 | ![]() |
數(shù)據(jù)手冊 | |
更新時間 | 2025-7-19 23:30:00 |
人工找貨 | AD9515SLASHPCBZ價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
AD9515SLASHPCBZ規(guī)格書詳情
GENERAL DESCRIPTION
The AD9515 features a two-output clock distribution IC in a
design that emphasizes low jitter and phase noise to maximize
data converter performance. Other applications with
demanding phase noise and jitter requirements also benefit
from this part.
There are two independent clock outputs. One output is
LVPECL, while the other output can be set to either LVDS or
CMOS levels. The LVPECL output operates to 1.6 GHz. The
other output operates to 800 MHz in LVDS mode and to
250 MHz in CMOS mode.
Each output has a programmable divider that can be set to
divide by a selected set of integers ranging from 1 to 32. The
phase of one clock output relative to the other clock output can
be set by means of a divider phase select function that serves as
a coarse timing adjustment.
The LVDS/CMOS output features a delay element with three
selectable full-scale delay values (1.5 ns, 5 ns, and 10 ns), each
with 16 steps of fine adjustment.
The AD9515 does not require an external controller for
operation or setup. The device is programmed by means of
11 pins (S0 to S10) using 4-level logic. The programming pins
are internally biased to ? VS. The VREF pin provides a level of
? VS. VS (3.3 V) and GND (0 V) provide the other two logic levels.
The AD9515 is ideally suited for data converter clocking
applications where maximum converter performance is
achieved by encode signals with subpicosecond jitter.
The AD9515 is available in a 32-lead LFCSP and operates from
a single 3.3 V supply. The temperature range is ?40°C to +85°C.
FEATURES
1.6 GHz differential clock input
2 programmable dividers
Divide-by in range from1 to 32
Phase select for coarse delay adjust
1.6 GHz LVPECL clock output
Additive output jitter 225 fs rms
800 MHz/250 MHz LVDS/CMOS clock output
Additive output jitter 300 fs rms/290 fs rms
Time delays up to 10 ns
Device configured with 4-level logic pins
Space-saving, 32-lead LFCSP
APPLICATIONS
Low jitter, low phase noise clock distribution
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
High performance wireless transceivers
High performance instrumentation
Broadband infrastructure
ATE
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
ADI |
三年內(nèi) |
1983 |
只做原裝正品 |
詢價 | |||
ADI |
0640+ |
QFN |
1 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
ADI/亞德諾 |
22+ |
66900 |
原封裝 |
詢價 | |||
ADI |
21+ |
QFN |
1 |
原裝現(xiàn)貨假一賠十 |
詢價 | ||
ADI |
25+23+ |
LFCSP-64 |
34166 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價 | ||
ADI |
2018+ |
VQFN64 |
6528 |
科恒偉業(yè)!承若只做進(jìn)口原裝正品假一賠十!1581728776 |
詢價 | ||
ANA |
24+ |
366 |
詢價 | ||||
AnalogDevices |
64-LFCSP |
2500 |
AD代理旗下一級分銷商,主營AD全系列產(chǎn)品 |
詢價 | |||
ADI/亞德諾 |
23+ |
EB/PCB |
3000 |
只做原裝正品,假一賠十 |
詢價 | ||
ADI |
21+ |
LFCSP-6 |
12588 |
原裝正品,自己庫存 假一罰十 |
詢價 |