ACS8526T屬于集成電路（IC）的應(yīng)用特定時鐘/定時。由升特制造生產(chǎn)的ACS8526T應(yīng)用特定時鐘/定時專用時鐘和計時 IC（集成電路）產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時間或頻率信息生成和分配相關(guān)的各種操作，適合的設(shè)計環(huán)境較特定，例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂總線等。

描述 Description

The ACS8526 is a highly integrated single-chip solution for protection switching between two SECs (SDH/SONET Equipment Clocks) from Master and Slave SETS clock cards, for line cards in a PDH, SONET or SDH Network Element. The ACS8526 has fast activity monitors on the inputs and will raise a flag on a pin if there is a loss of activity on the currently selected input. The protection switching between the input reference clock sources is controlled by an external pin.

特性 Features

◆ Line card protection switch - partners Semtech SETS devices for Stratum 3E/3/4E/4 PDH, SONET or SDH applications

◆ High performance DPLL/APLL solution

◆ Output jitter compliant to STM-1

◆ Two independent SEC inputs ports (TTL)

◆ Four independent output ports:

◆ Two clock ports: one PECL/LVDS, one TTL

◆ Two Syncs (TTL): 8 kHz FrSync & 2 KHz MFrSync

◆ TTL I/O ports: spot frequencies 2 kHz to 77.76 MHz

◆ PECL/LVDS port: spot frequencies 2 kHz to 311 MHz

◆ N x E1/DS1 mode

◆ Programmable pulse width and polarity on Syncs

◆ SONET/SDH frequency translation

◆ Digital Holdover mode on input failure

◆ Separate activity monitors and register alarms on each input.

◆ “Loss of activity” on selected input flagged on dedicated pin

◆ Source switch under external hardware control

◆ PLL “Locked” and “Acquisition” bandwidth selectable from 18, 35 or 70 Hz

◆ Configurable via serial interface or hardware pins

◆ Output clock phase continuity to GR-1244-CORE[13]

◆ Single 3.3 V operation, 5 V I/O compatible

◆ IEEE 1149.1 JTAG Boundary Scan is supported

◆ Operating temperature (ambient) of -40 to +85°C

◆ Available in LQFP 64 package

◆ Lead (Pb)-free version available (ACS8526T), RoHS and WEEE compliant.