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74AC11240DW

Marking：AC11240；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDConfigurations MinimizeHigh-SpeedSwitchingNoise EPIC(Enhanced-PerformanceImplanted CMOS)1-
mProcess 500-mATypicalLatch-UpImmunityat 125°C PackageOptionsIncludePlastic Small-Outline(DW)andShrink Small-

74AC11240DW.A

Marking：AC11240；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDConfigurations MinimizeHigh-SpeedSwitchingNoise EPIC(Enhanced-PerformanceImplanted CMOS)1-
mProcess 500-mATypicalLatch-UpImmunityat 125°C PackageOptionsIncludePlastic Small-Outline(DW)andShrink Small-

74AC11244DW

Marking：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE(Enhanced-PerformanceImplanted CMOS)1-mmProcess 3-StateOutputsDriveBusLinesorBuffer MemoryAddressRegisters Flow-ThroughArchitectureOptimizesPCB Layout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise 500-mATypicalLatch-UpImmunityat 12

74AC11244DWR

Marking：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE(Enhanced-PerformanceImplanted CMOS)1-mmProcess 3-StateOutputsDriveBusLinesorBuffer MemoryAddressRegisters Flow-ThroughArchitectureOptimizesPCB Layout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise 500-mATypicalLatch-UpImmunityat 12

74AC11244DWR.A

Marking：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE(Enhanced-PerformanceImplanted CMOS)1-mmProcess 3-StateOutputsDriveBusLinesorBuffer MemoryAddressRegisters Flow-ThroughArchitectureOptimizesPCB Layout Center-PinVCCandGNDPin ConfigurationsMinimizeHigh-Speed SwitchingNoise 500-mATypicalLatch-UpImmunityat 12

74AC11245DWR.A

Marking：AC11245；Package：SOIC；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-StateOutputsDriveBusLinesDirectly Flow-ThroughArchitectureOptimizes PCBLayout Center-PinVCCandGNDConfigurations MinimizeHigh-SpeedSwitchingNoise EPIC(Enhanced-PerformanceImplanted CMOS)1-
mProcess 500-mATypicalLatch-UpImmunityat 125°C PackageOptionsIncludePlas

CD74AC112M

Marking：AC112M；Package：SOIC；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro

CD74AC112M96

Marking：AC112M；Package：SOIC；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro

CD74AC112M96.A

Marking：AC112M；Package：SOIC；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro

SN74AC11IDRG4Q1

Marking：AC11IQ1；Package：SOIC；SN74AC11-Q1 Automotive Triple 3-Input Positive-AND Gate

1Features ?AEC-Q100qualifiedforautomotiveapplications: –Devicetemperaturegrade1:-40°Cto+125°C –DeviceHBMESDclassificationlevel2 –DeviceCDMESDclassificationlevelC4B ?Wideoperatingrangeof1.5Vto6V ?Inputsacceptvoltagesupto6V ?Continuous24mAoutputdrive