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Fast-Acting Fuse

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Radiation Hardened EDAC (Error Detection and Correction Circuit)

Description The Intersil ACS630MS is a Radiation Hardened 16-bit parallel error detection and correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The check word is stored with the data word during a memory write cycle; during a memory rea

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Intersil

Radiation Hardened EDAC (Error Detection and Correction Circuit)

Features ? Devices QML Qualified in Accordance with MIL-PRF-38535 ? Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96711 and Intersil’ QM Plan ? 1.25 Micron Radiation Hardened SOS CMOS ? Total Dose >300K RAD (Si) ? Single Event Upset (SEU) Immunity:

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Radiation Hardened EDAC (Error Detection and Correction Circuit)

Description The Intersil ACS630MS is a Radiation Hardened 16-bit parallel error detection and correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The check word is stored with the data word during a memory write cycle; during a memory rea

文件：489.72 Kbytes 頁數(shù)：4 Pages

Intersil