描述 Description

The ACT? 1 Series of field programmable gate arrays (FPGAs) offers a variety of package, speed, and application combinations. Devices are implemented in silicon gate, 1-micron two-level metal CMOS, and they employ Actel’s PLICE? antifuse technology. The unique architecture offers gate array flexibility, high performance, and instant turnaround through user programming. Device utilization is typically 95 to 100 percent of available logic modules.

ACT 1 devices also provide system designers with unique on-chip diagnostic probe capabilities, allowing convenient testing and debugging. Additional features include an on-chip clock driver with a hardwired distribution network. The network provides efficient clock distribution with minimum skew.

The user-definable I/Os are capable of driving at both TTL and CMOS drive levels. Available packages include plastic and ceramic J-leaded chip carriers, ceramic and plastic quad flatpacks, and ceramic pin grid array.

特性 Features

? 5V and 3.3V Families fully compatible with JEDEC specifications
? Up to 2000 Gate Array Gates (6000 PLD equivalent gates)
? Replaces up to 50 TTL Packages
? Replaces up to twenty 20-Pin PAL? Packages
? Design Library with over 250 Macro Functions
? Gate Array Architecture Allows Completely Automatic Place and Route
? Up to 547 Programmable Logic Modules
? Up to 273 Flip-Flops
? Data Rates to 75 MHz
? Two In-Circuit Diagnostic Probe Pins Support Speed Analysis to 25 MHz
? Built-In High Speed Clock Distribution Network
? I/O Drive to 10 mA (5 V), 6 mA (3.3 V)
? Nonvolatile, User Programmable
? Fabricated in 1.0 micron CMOS technology