特性 Features

? Ten 100MHz clocks for PCI Express, HCSL interface levels

? One single-ended QG LVCMOS/LVTTL clock output at 125MHz

? One single-ended QF LVCMOS/LVTTL clock output at 50MHz,

15? output impedance

? Two single-ended QREFx LVCMOS/LVTTL outputs at 25MHz,

15? output impedance

? Selectable external crystal or differential (single-ended) input

source

? Crystal oscillator interface designed for 25MHz, parallel resonant

crystal

? Differential CLK, nCLK input pair that can accept: LVPECL, LVDS,

LVHSTL, HCSL input levels

? Internal resistor bias on nCLK pin allows the user to drive CLK

input with external single-ended (LVCMOS/ LVTTL) input levels

? Supply Modes, (125MHz QG output and 25MHz QREFx outputs):

Core / Output

3.3V / 3.3V

3.3V / 2.5V

? Supply Modes, (HCSL outputs, and 50MHz QF output):

Core / Output

3.3V / 3.3V

? -40°C to 85°C ambient operating temperature

? Available in Lead-free (RoHS 6) package