特性 Features

◆ High-performance 64-bit embedded Microprocessor

– 250MHz operating frequency

– >330 Dhrystone MIPS performance

– 300MFLOPS/s floating-point performance

– Up to 125 million multiply accumulate per second (MAC/s)

– MIPS-IV Instruction Set Architecture (ISA), with integer DSP

and 3-operand integer multiply extensions

– Limited dual-issue microarchitecture

◆ Compatible with RC4640 and RC32364 DSP extensions

– DSP Extensions, for consumer applications

– 2-cycle repeat rate, on atomic Multiply-add

– Multiply-subtract (MSUB) support, for complex number

processing

– Count-leading-zero/one support, for string searches and

normalization

◆ High-performance on-chip cache subsystem

– 32kB, two-set associative instruction cache (I-cache)

– 32kB, two-set associative data cache (D-cache)

– Write-through and write-back data cache operations

– High-performance cache-ops, bandwidth management

◆ I-cache and D-cache locking capability (per line), provides

improved real-time support

◆ Joint TLB on-chip, for virtual-to-physical address mapping