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74VHC595

8-Bit Shift Register with Output Latches

GeneralDescription TheVHC595isanadvancedhigh-speedCMOSShiftRegisterfabricatedwithsilicongateCMOStechnology.Itachievesthehigh-speedoperationsimilartoequivalentBipolarSchottkyTTLwhilemaintainingtheCMOSlowpowerdissipation. Features ■HighSpeed:tPD=5.4ns(

74VHC595

8-bit serial-in/serial-out or parallel-out shift register with output latches

1.Generaldescription The74VHC595;74VHCT595arehigh-speedSi-gateCMOSdevicesandarepincompatiblewith Low-powerSchottkyTTL(LSTTL).ItisspecifiedincompliancewithJEDECstandardNo.7A. The74VHC595;74VHCT595are8-stageserialshiftregisterswithastorageregisterand3-state

74VHC595

8 位移位寄存器，帶輸出鎖存; ?高速： VCC = 5V時(shí)，tPD = 5.4 ns（典型值）\n?低功耗： TA = 25°C時(shí)，ICC = 2 μA（最大值）\n?高抗噪能力： VNIH = VNIL = 28% VCC （最小值）\n?所有輸入上都提供掉電保護(hù)\n?低噪聲： VOLP = 0.9V（典型值）\n?引腳和功能與74HC595兼容\n;

VHC595是一款先進(jìn)的高速CMOS單穩(wěn)態(tài)多諧振蕩器，采用硅柵極CMOS技術(shù)制造。 它實(shí)現(xiàn)了與等效雙極型肖特基TTL相似的高速運(yùn)行，同時(shí)保持了CMOS低功耗。 它包含一個(gè)8位串進(jìn)并出移位寄存器，可以饋入8位D型存儲(chǔ)寄存器。 該存儲(chǔ)寄存器具有8個(gè)3態(tài)輸出。 移位寄存器和存儲(chǔ)寄存器都提供獨(dú)立的時(shí)鐘。 移位寄存器具有直接覆蓋清零、串行輸入和串行輸出（標(biāo)準(zhǔn)）引腳，以用于級(jí)聯(lián)。 移位寄存器和存儲(chǔ)寄存器都使用正邊沿觸發(fā)時(shí)鐘。 如果兩個(gè)時(shí)鐘連接在一起，則移位寄存器狀態(tài)始終比存儲(chǔ)寄存器提前一個(gè)時(shí)鐘脈沖。 輸入保護(hù)電路確保0V至7V可應(yīng)用于輸入引腳，無(wú)需考慮電源電壓。 此器件可用于連接5V至3V系統(tǒng)和兩個(gè)電源系統(tǒng)（例如備用電池）。 此電路可防止器件因電源和輸入電壓不匹配而受損。

74VHC595

8-Bit Shift Register with Output Latches

74VHC595

8-Bit Shift Register with Output Latches

74VHC595BQ

8-bit serial-in/serial-out or parallel-out shift register with output latches

1.Generaldescription The74VHC595;74VHCT595arehigh-speedSi-gateCMOSdevicesandarepincompatiblewith Low-powerSchottkyTTL(LSTTL).ItisspecifiedincompliancewithJEDECstandardNo.7A. The74VHC595;74VHCT595are8-stageserialshiftregisterswithastorageregisterand3-state

74VHC595BQ

8-bit serial-in/serial-out or parallel-out shift register with output latches

Generaldescription The74VHC595;74VHCT595arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithLow-powerSchottkyTTL(LSTTL).ItisspecifiedincompliancewithJEDECstandardNo.7A. The74VHC595;74VHCT595are8-stageserialshiftregisterswithastorageregisterand3-stateout

ETC

74VHC595BQ-Q100

8-bit serial-in/serial-out or parallel-out shift register with output latches; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40°C to +85°C and from -40°C to +125°C\n\n? Balanced propagation delays\n? All inputs have Schmitt-trigger action\n? Inputs accept voltages higher than VCC\n? Input levels:? The 74VHC595-Q100 operates with CMOS input level\n? The 74VHCT595-Q100 operates with TTL input level\n\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200pF, R = 0Ω)\n\n? Multiple package options\n;

The 74VHC595-Q100; 74VHCT595-Q100 are high?speed Si?gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No.7A.\n The 74VHC595-Q100; 74VHCT595-Q100 are 8?stage serial shift registers with a storage register and 3-state outputs. The shift registers have separate clocks.\n Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each register is transferred to the storage register on a positive-going transition of the storage register clock input (STCP). If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register.\n The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74VHC595D

8-bit serial-in/serial-out or parallel-out shift register with output latches

Generaldescription The74VHC595;74VHCT595arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithLow-powerSchottkyTTL(LSTTL).ItisspecifiedincompliancewithJEDECstandardNo.7A. The74VHC595;74VHCT595are8-stageserialshiftregisterswithastorageregisterand3-stateout

ETC

74VHC595D

8-bit serial-in/serial-out or parallel-out shift register with output latches

1.Generaldescription The74VHC595;74VHCT595arehigh-speedSi-gateCMOSdevicesandarepincompatiblewith Low-powerSchottkyTTL(LSTTL).ItisspecifiedincompliancewithJEDECstandardNo.7A. The74VHC595;74VHCT595are8-stageserialshiftregisterswithastorageregisterand3-state