描述 Description

The 74LVC245A; 74LVCH245A are 8-bit transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

特性 Features

? 5 V tolerant inputs/outputs for interfacing with 5 V logic
? Wide supply voltage range from 1.2 V to 3.6 V
? CMOS low-power consumption
? Direct interface with TTL levels
? Inputs accept voltages up to 5.5 V
? High-impedance when VCC = 0 V
? Bushold on all data inputs (74LVCH245A only)
? Complies with JEDEC standard:
? JESD8-7A (1.65 V to 1.95 V)
? JESD8-5A (2.3 V to 2.7 V)
? JESD8-C/JESD36 (2.7 V to 3.6 V)

? ESD protection:
? HBM JESD22-A114F exceeds 2000 V
? MM JESD22-A115B exceeds 200 V
? CDM JESD22-C101E exceeds 1000 V

? Specified from -40 °C to +85 °C and -40 °C to +125 °C