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74LVC1G17GW

Single Schmitt-trigger buffer

DESCRIPTION The74LVC1G17isahigh-performance,low-power,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. Theinputcanbedrivenfromeither3.3Vor5Vdevices.Thisfeatureallowstheuseofthisdeviceinamixed3.3Vand5Venvironment.

PHI

74LVC1G17GW

Single Schmitt trigger buffer

Generaldescription The74LVC1G17providesabufferfunctionwithSchmitttriggerinput.Itiscapableoftransformingslowlychanginginputsignalsintosharplydefinedoutputs. Theinputcanbedrivenfromeither3.3Vor5Vdevices.Thisfeatureallowstheuseofthisdeviceinamixed3.3V

ETC

74LVC1G17GW

Single Schmitt trigger buffer

Generaldescription The74LVC1G17providesabufferfunctionwithSchmitttriggerinput.Itiscapableoftransformingslowlychanginginputsignalsintosharplydefinedoutputs. Theinputcanbedrivenfromeither3.3Vor5Vdevices.Thisfeatureallowstheuseofthisdeviceinamixed3.3V

ETC

74LVC1G17GW

絲?。?a target="_blank" title="Marking" href="/vj/marking.html">VJ；Package：SOT353-1；Single Schmitt trigger buffer

1.Generaldescription The74LVC1G17isasinglebufferSchmitt-trigger.Inputscanbedrivenfromeither3.3Vor 5Vdevices.Thisfeatureallowstheuseofthesedevicesastranslatorsinmixed3.3Vand5V environments.Thisdeviceisfullyspecifiedforpartialpowerdownapplicationsusi

74LVC1G17GW

Single Schmitt trigger buffer; ? Wide supply voltage range from 1.65 V to 5.5 V\n? High noise immunity\n? Complies with JEDEC standard? JESD8-7 (1.65 V to 1.95 V)\n? JESD8-5 (2.3 V to 2.7 V)\n? JESD8B/JESD36 (2.7 V to 3.6 V)\n\n? ESD protection:? HBM: ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2000 V\n? MM: JESD22-A115-A exceeds 200 V\n\n? ±24 mA output drive (VCC = 3.0 V)\n? CMOS low power consumption\n? Latch-up performance exceeds 250 mA\n? Direct interface with TTL levels\n? Unlimited rise and fall times\n? Inputs accept voltages up to 5 V\n? Multiple package options\n? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n;

The 74LVC1G17 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs.\n The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n

74LVC1G17GW-Q100

Single Schmitt trigger buffer; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Wide supply voltage range from 1.65 V to 5.5 V\n? High noise immunity\n? Complies with JEDEC standard? JESD8-7 (1.65 V to 1.95 V)\n? JESD8-5 (2.3 V to 2.7 V)\n? JESD8B/JESD36 (2.7 V to 3.6 V)\n\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 ?)\n\n? ±24 mA output drive (VCC = 3.0 V)\n? CMOS low power consumption\n? Latch-up performance exceeds 250 mA\n? Direct interface with TTL levels\n? Unlimited rise and fall times\n? Inputs accept voltages up to 5 V\n;

The 74LVC1G17-Q100 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs.\n The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74LVC1G17GW-Q100

絲?。?a target="_blank" title="Marking" href="/vj/marking.html">VJ；Package：TSSOP5；Single Schmitt trigger buffer

1.Generaldescription The74LVC1G17-Q100isasinglebufferSchmitt-trigger.Inputscanbedrivenfromeither3.3V or5Vdevices.Thisfeatureallowstheuseofthesedevicesastranslatorsinmixed3.3Vand5 Venvironments.Thisdeviceisfullyspecifiedforpartialpowerdownapplication

74LVC1G17GW-Q100

絲?。?a target="_blank" title="Marking" href="/vj/marking.html">VJ；Package：TSSOP5；Single Schmitt trigger buffer

1.Generaldescription The74LVC1G17-Q100isasinglebufferSchmitt-trigger.Inputscanbedrivenfromeither3.3V or5Vdevices.Thisfeatureallowstheuseofthesedevicesastranslatorsinmixed3.3Vand5 Venvironments.Thisdeviceisfullyspecifiedforpartialpowerdownapplication

74LVC1G17GW,125

Package：5-TSSOP，SC-70-5，SOT-353；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 緩沖器，驅(qū)動器，接收器，收發(fā)器 描述：IC BUF NON-INVERT 5.5V 5TSSOP

ETC

74LVC1G17GW-Q100,1

Package：5-TSSOP，SC-70-5，SOT-353；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 緩沖器，驅(qū)動器，接收器，收發(fā)器 描述：IC BUF NON-INVERT 5.5V 5TSSOP

ETC