74LVC1G123DC屬于集成電路（IC）的多諧振蕩器。由安世半導(dǎo)體(中國(guó))有限公司制造生產(chǎn)的74LVC1G123DC多諧振蕩器多諧振蕩器是簡(jiǎn)單的雙態(tài)器件，盡管它們的典型使用方式在很大程度上具有模擬特性，但通常被認(rèn)為是數(shù)字邏輯元器件。單穩(wěn)型也稱(chēng)為“單發(fā)”，具有一種穩(wěn)定狀態(tài)；但施加觸發(fā)信號(hào)可使它們離開(kāi)此狀態(tài)一段時(shí)間，該時(shí)間通常由所連接電容器的值來(lái)確定。這些器件對(duì)于去彈跳開(kāi)關(guān)觸頭等應(yīng)用非常有用。非穩(wěn)型沒(méi)有穩(wěn)定狀態(tài)，在兩個(gè)狀態(tài)之間按一定頻率持續(xù)轉(zhuǎn)換，該頻率通常也是由所連接電容器的值來(lái)確定。

1. General description

The 74LVC1G123 is a single retriggerable monostable multivibrator with Schmitt trigger inputs.

Output pulse width is controlled by three methods:

1. The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT).

2. Once triggered, the basic output pulse width may be extended by retriggering the gated active

LOW-going edge input (A) or the active HIGH-going edge input (B). By repeating this process,

the output pulse period (Q = HIGH) can be made as long as desired. Alternatively an output

delay can be terminated at any time by a LOW-going edge on input CLR, which also inhibits the

triggering.

3. An internal connection from CLR to the input gates makes it possible to trigger the circuit by a

HIGH-going signal at input CLR.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices

as translators in a mixed 3.3 V and 5 V environment. Schmitt trigger inputs, makes the circuit highly

tolerant to slower input rise and fall times.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

2. Features and benefits

? Wide supply voltage range from 1.65 V to 5.5 V

? High noise immunity

? ±24 mA output drive (VCC = 3.0 V)

? CMOS low power consumption

? DC triggered from active HIGH or active LOW inputs

? Retriggerable for very long pulses up to 100 duty factor

? Direct reset terminates output pulse

? Schmitt trigger on all inputs

? Complies with JEDEC standard:

? JESD8-7 (1.65 V to 1.95 V)

? JESD8-5 (2.3 V to 2.7 V)

? JESD8-B/JESD36 (2.7 V to 3.6 V)

? Power-on-reset on outputs

? Latch-up performance exceeds 100 mA

? Direct interface with TTL levels

? Inputs accept voltages up to 5.5 V

? ESD protection:

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V

? CDM JESD22-C101E exceeds 1000 V

? Multiple package options

? Specified from -40 °C to +85 °C and -40 °C to +125 °C