描述 Description

The 74LV1T04 is a single, level translating inverting buffer. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V and 5.0 V CMOS levels. The wide VCC range permits the generation of output levels to connect to controllers or processors.

特性 Features

? Single supply voltage translator at 1.8 V, 2.5 V, 3.3 V and 5.0 V
? Up translation
? 1.2 V to 1.8 V at VCC = 1.8 V
? 1.5 V to 2.5 V at VCC = 2.5 V
? 1.8 V to 3.3 V at VCC = 3.3 V
? 3.3 V to 5.0 V at VCC = 5.0 V

? Down translation
? 3.3 V to 1.8 V at VCC = 1.8 V
? 3.3 V to 2.5 V at VCC = 2.5 V
? 5.0 V to 3.3 V at VCC = 3.3 V

? 5 V tolerant inputs
? Latch-up performance exceeds 250 mA per JESD 78 Class II
? ESD protection:
? HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
? CDM JESD22-C101 exceeds 1 kV

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

應(yīng)用 Application

? Portable applications
? PC and notebooks
? Industrial controller
? Telecom