74LS75中文資料仙童半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書
74LS75規(guī)格書詳情
General Description
These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable is HIGH, and the Q output will follow the data input as long as the enable remains HIGH. When the enable goes LOW, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go HIGH.
These latches feature complementary Q and Q outputs from a 4-bit latch, and are available in 16-pin packages.
產(chǎn)品屬性
- 型號：
74LS75
- 功能描述：
INTEGRATED CIRCUIT PINOUTS
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
24+ |
80000 |
只做自己庫存 全新原裝進口正品假一賠百 可開13%增 |
詢價 | ||||
TI |
24+ |
DIP-16 |
30000 |
原裝正品公司現(xiàn)貨,假一賠十! |
詢價 | ||
TI/TEXAS |
23+ |
DIP |
8931 |
詢價 | |||
TI/德州儀器 |
25+ |
DIP |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價 | ||
TI |
21+ |
DIP-16 |
10000 |
只做原裝,質(zhì)量保證 |
詢價 | ||
24+ |
1 |
詢價 | |||||
74LS75N |
3 |
3 |
詢價 | ||||
ST |
23+ |
3.9mm-16 |
16900 |
正規(guī)渠道,只有原裝! |
詢價 | ||
TI |
23+ |
DIP |
5000 |
原裝正品,假一罰十 |
詢價 | ||
TI/德州儀器 |
22+ |
SOP16 |
9880 |
原裝正品 |
詢價 |
