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74LCX125

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

GeneralDescription TheLCX125containsfourindependentnon-invertingbufferswith3-STATEoutputs.Theinputstoleratevoltagesupto7Vallowingtheinterfaceof5Vsystemsto3Vsystems. The74LCX125isfabricatedwithanadvancedCMOStechnologytoachievehighspeedoperationwhilemaintai

74LCX125

LOW VOLTAGE CMOS QUAD BUS BUFFER (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

DESCRIPTION The74LCX125isalowvoltageCMOSQUADBUSBUFFERfabricatedwithsub-micronsilicongateanddouble-layermetalwiringC2MOStechnology. ■5VTOLERANTINPUTSANDOUTPUTS ■HIGHSPEED: tPD=5.2ns(MAX.)atVCC=3V ■POWERDOWNPROTECTIONONINPUTS ANDOUTPUTS ■

74LCX125

Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs

Features ■5Vtolerantinputsandoutputs ■Highspeed –tPD=5.2ns(max.)atVCC=3V ■Power-downprotectiononinputsandoutputs ■Symmetricaloutputimpedance –|IOH|=IOL=24mA(min.)atVCC=3V ■PCIbuslevelsguaranteedat24mA ■Balancedpropagationdelay –tPLH?tPHL

74LCX125

低壓CMOS四路總線緩沖器（3態(tài)），5 V容限輸入和輸出; ? 5 V tolerant inputs and outputs \n? High speed \n ?tPD= 5.2 ns (max.) at VCC= 3 V \n? Power-down protection on inputs and outputs \n? Symmetrical output impedance \n ?|IOH| = IOL= 24 mA (min.) at VCC= 3 V \n? PCI bus levels guaranteed at 24 mA \n? Balanced propagation delay \n ?tPLH? tPHL \n? Operating voltage range \n ?VCC(opr.) = 2.0 V to 3.6 V \n? Pin and function compatible with 74 series 125 \n? Latch-up performance exceeds 500 mA (JESD 17) \n? ESD performance \n ?HBM: 2000 V (MIL STD 883 method 3015) \n ?MM: 200 V \n ?CDM: 1000 V;

The 74LCX125 device is a low-voltage CMOS quad bus buffer manufactured with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low-power and high-speed 3.3 V applications and can be interfaced to a 5 V signal environment for both inputs and outputs.\n\n The device requires the 3-state control input G to be set high to place the output in the high impedance state.\n\n It has the same speed performance at 3.3 V as the 5 V AC/ACT family, combined with lower power consumption.\n\n All inputs and outputs are equipped with protection circuits against static discharge, giving them 2 kV ESD immunity and transient excess voltage.\n\n

74LCX125

帶 5V 耐受輸入和輸出的低壓四路緩沖器; ?5V容差輸入和輸出\n?提供2.3V-3.6V VCC規(guī)格\n?6.0 ns tPD最大值(VCC = 3.3V)，10 μA ICC最大值\n?掉電高阻抗輸入和輸出\n?支持帶電插/拔（注1）\n?±24 mA輸出驅(qū)動(VCC = 3.0V)\n?實施專利噪聲/電磁干擾(EMI)消減電路\n?閂鎖性能超越JEDEC 78條件\n?ESD性能：人體模型> 2000V 機器模型> 100V\n?無引線無鉛DQFN封裝\n;

LCX125包含四個帶3態(tài)輸出的獨立同相緩沖器。 輸入容許電壓達7V，允許5V系統(tǒng)到3V系統(tǒng)的連接。 74LCX125采用先進的CMOS技術(shù)制造，以在實現(xiàn)高速運行的同時保持CMOS低功耗。

74LCX125

Low voltage CMOS quad bus buffer (3-State) with 5V tolerant inputs and outputs

74LCX125

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

74LCX125_V01

Low-voltage CMOS quad bus buffer (3-state) with 5 V tolerant inputs and outputs

Features ■5Vtolerantinputsandoutputs ■Highspeed –tPD=5.2ns(max.)atVCC=3V ■Power-downprotectiononinputsandoutputs ■Symmetricaloutputimpedance –|IOH|=IOL=24mA(min.)atVCC=3V ■PCIbuslevelsguaranteedat24mA ■Balancedpropagationdelay –tPLH?tPHL

74LCX125BQX

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

GeneralDescription TheLCX125containsfourindependentnon-invertingbufferswith3-STATEoutputs.Theinputstoleratevoltagesupto7Vallowingtheinterfaceof5Vsystemsto3Vsystems. The74LCX125isfabricatedwithanadvancedCMOStechnologytoachievehighspeedoperationwhilemaintai

74LCX125FT

絲?。?a target="_blank" title="Marking" href="/lcx125/marking.html">LCX125；Package：TSSOP14B；CMOS Digital Integrated Circuits Silicon Monolithic

General The74LCX125FTisahigh-performanceCMOSquadbusbuffers.Designedforusein3.3Vsystems,itachieves high-speedoperationwhilemaintainingtheCMOSlowpowerdissipation. Thedeviceisdesignedforlow-voltage(3.3V)VCCapplications,butitcouldbeusedtointerfaceto5Vsup