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74HCT4053PW

Triple 2-channel analog multiplexer/demultiplexer; ? Wide analog input voltage range from -5 V to +5 V\n? Complies with JEDEC standard no. 7A\n? Low ON resistance:? 80 Ω (typical) at VCC - VEE = 4.5 V\n? 70 Ω (typical) at VCC - VEE = 6.0 V\n? 60 Ω (typical) at VCC - VEE = 9.0 V\n\n? Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals\n? Typical ‘break before make’ built-in\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n? CDM JESD22-C101E exceeds 1000 V\n\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74HC4053; 74HCT4053 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n

74HCT4053PW

Triple 2-channel analog multiplexer/demultiplexer

Generaldescription The74HC4053;74HCT4053isahigh-speedSi-gateCMOSdeviceandispincompatiblewiththeHEF4053B.ItisspecifiedincompliancewithJEDECstandardno.7A.

74HCT4053PW

Triple 2-channel analog multiplexer/demultiplexer

1.Generaldescription The74HC4053;74HCT4053isatriplesingle-poledouble-throwanalogswitch(3xSPDT)suitable foruseinanalogordigital2:1multiplexer/demultiplexerapplications.Eachswitchfeaturesadigital selectinput(Sn),twoindependentinputs/outputs(nY0andnY1)andacomm

74HCT4053PW-Q100

Triple 2-channel analog multiplexer/demultiplexer

1.Generaldescription The74HC4053-Q100;74HCT4053-Q100isatriplesingle-poledouble-throwanalogswitch (3xSPDT)suitableforuseinanalogordigital2:1multiplexer/demultiplexerapplications.Each switchfeaturesadigitalselectinput(Sn),twoindependentinputs/outputs(nY0andnY1)

74HCT4053PW-Q100

Triple 2-channel analog multiplexer/demultiplexer; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Wide analog input voltage range from -5 V to +5 V\n? Low ON resistance:? 80 Ω (typical) at VCC - VEE = 4.5 V\n? 70 Ω (typical) at VCC - VEE = 6.0 V\n? 60 Ω (typical) at VCC - VEE = 9.0 V\n\n? Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals\n? Typical ‘break before make’ built-in\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n? CDM AEC-Q100-011 revision B exceeds 1000 V\n\n? Multiple package options\n? DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints\n;

The 74HC4053-Q100; 74HCT4053-Q100 is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

CD74HCT4053

High-SpeedCMOSLogicAnalogMultiplexers/Demultiplexers

CD74HCT4053

High-SpeedCMOSLogicAnalogMultiplexers/Demultiplexers

CD74HCT4053

HighSpeedCMOSLogicAnalogMultiplexers/Demultiplexers

CD74HCT4053

High-SpeedCMOSLogicAnalogMultiplexers/Demultiplexers

CD74HCT4053

High-SpeedCMOSLogicAnalogMultiplexers/Demultiplexers