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74HCT164PW

8-bit serial-in, parallel-out shift register

Generaldescription The74HC164;74HCT164isan8-bitserial-in/parallel-outshiftregister.Thedevicefeaturestwoserialdatainputs(DSAandDSB),eightparalleldataoutputs(Q0toQ7).DataisenteredseriallythroughDSAorDSBandeitherinputcanbeusedasanactiveHIGHenablefordata

74HCT164PW

8-bit serial-in, parallel-out shift register; ? Input levels:? For 74HC164: CMOS level\n? For 74HCT164: TTL level\n\n? Gated serial data inputs\n? Asynchronous master reset\n? Complies with JEDEC standard no. 7A\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n\n? Multiple package options\n? Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃.\n;

The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW?to?HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n

74HCT164PW

8-bit serial-in, parallel-out shift register

74HCT164PW-Q100

8-bit serial-in, parallel-out shift register; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1):? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Input levels:? For 74HC164-Q100: CMOS level\n? For 74HCT164-Q100: TTL level\n\n? Gated serial data inputs\n? Asynchronous master reset\n? Complies with JEDEC standard no. 7A\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n? Multiple package options\n;

The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74HCT164PW-Q100

8-bit serial-in, parallel-out shift register

Generaldescription The74HC164-Q100;74HCT164-Q100isan8-bitserial-in/parallel-outshiftregister.Thedevicefeaturestwoserialdatainputs(DSAandDSB),eightparalleldataoutputs(Q0toQ7).DataisenteredseriallythroughDSAorDSBandeitherinputcanbeusedasanactiveHIGHenabl

74HCT164PW-Q100

8-bit serial-in, parallel-out shift register

1.Generaldescription The74HC164-Q100;74HCT164-Q100isan8-bitserial-in/parallel-outshiftregister.Thedevice featurestwoserialdatainputs(DSAandDSB),eightparalleldataoutputs(Q0toQ7).Datais enteredseriallythroughDSAorDSBandeitherinputcanbeusedasanactiveHIGH

74HCT164PW,112

Package：14-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 功能：串行至并行 類別：集成電路（IC） 移位寄存器 描述：IC SHIFT REG 8BIT SI-PO 14TSSOP

Nexperia USA Inc.

74HCT164PW,118

Package：14-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 功能：串行至并行 類別：集成電路（IC） 移位寄存器 描述：IC SHIFT REG 8BIT SI-PO 14TSSOP

Nexperia USA Inc.

74HCT164PW-Q100J

Package：14-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR） 功能：串行至并行 類別：集成電路（IC） 移位寄存器 描述：IC SHIFT REG 8BIT SI-PO 14TSSOP

Nexperia USA Inc.