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74HC4514PW

4-to-16 line decoder/demultiplexer with input latches

1.Generaldescription The74HC4514;74HCT4514isa4-to-16linedecoder/demultiplexerhavingfourbinaryweighted addressinputs(A0toA3),withlatches,alatchenableinput(LE),anenableinput(E)and 16outputs(Q0toQ15).WhenLEisHIGH,theselectedoutputisdeterminedbythedatao

74HC4514PW

4-to-16 line decoder/demultiplexer with input latches; ? Input levels:? For 74HC4514: CMOS level\n? For 74HCT4514: TTL level\n\n? 16-line demultiplexing capability\n? Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n? Complies with JEDEC standard no. 7 A\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74HC4514; 74HCT4514 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input E does not affect the state of the latch. When the device is used as a demultiplexer, E is the data input and A0 to A3 are the address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n The 74HCT4514 features reduced input threshold levels to allow interfacing to TTL logic levels.\n

74HC4514PW-Q100

4-to-16 line decoder/demultiplexer with input latches; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Wide supply voltage range from 2.0 to 6.0 V\n? CMOS low power dissipation\n? High noise immunity\n? CMOS input levels\n? 16-line demultiplexing capability\n? Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B\n? Complies with JEDEC standards? JESD8C (2.7 V to 3.6 V)\n? JESD7A (2.0 V to 6.0 V)\n\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n\n;

The 74HC4514-Q100 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input E does not affect the state of the latch. When the device is used as a demultiplexer, E is the data input and A0 to A3 are the address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74HC4514PW-Q100

4-to-16 line decoder/demultiplexer with input latches

1.Generaldescription The74HC4514-Q100isa4-to-16linedecoder/demultiplexerhavingfourbinaryweightedaddress inputs(A0toA3),withlatches,alatchenableinput(LE),anenableinput(E)and16outputs(Q0 toQ15).WhenLEisHIGH,theselectedoutputisdeterminedbythedataonAn.

74HC4514PW,112

Package：24-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類(lèi)別：集成電路（IC） 信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器 描述：IC DECODER/DEMUX 1X4:16 24TSSOP

Nexperia USA Inc.

74HC4514PW,118

Package：24-TSSOP（0.173"，4.40mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類(lèi)別：集成電路（IC） 信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器 描述：IC DECODER/DEMUX 1X4:16 24TSSOP

Nexperia USA Inc.