零件型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
---|---|---|---|---|
74HC377PW | Octal D-type flip-flop with data enable; positive-edge trigger GENERALDESCRIPTION The74HC/HCT377arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES ?Idealforaddressableregisterapplications ?Dataenableforaddressanddatas | PhilipsPhilips Semiconductors 飛利浦荷蘭皇家飛利浦 | Philips | |
74HC377PW | Octal D-type flip-flop with data enable; positive-edge trigger 1.Generaldescription The74HC377;74HCT377isanoctalpositive-edgetriggeredD-typeflip-flop.Thedevicefeatures clock(CP)anddataenable(E)inputs.WhenEisLOW,theoutputsQnassumethestateoftheir correspondingDninputsthatmeettheset-upandholdtimerequirementsontheLO | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | NEXPERIA | |
74HC377PW | Octal D-type flip-flop with data enable; positive-edge trigger; ? Common clock and master reset\n? Eight positive edge-triggered D-type flip-flops\n? Complies with JEDEC standard no. 7A\n? Input levels:? For 74HC377: CMOS level\n? For 74HCT377: TTL level\n\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n\n? Multiple package options\n? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n; The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n | NexperiaNexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | Nexperia | |
Octal D-type flip-flop with data enable; positive-edge trigger; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40°C to +85°C and from -40°C to +125°C\n\n? Input levels:? For 74HC377-Q100: CMOS level\n? For 74HCT377-Q100: TTL level\n\n? Common clock and master reset\n? Eight positive edge-triggered D-type flip-flops\n? Complies with JEDEC standard no. 7A\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000V\n? HBM JESD22-A114F exceeds 2000V\n? MM JESD22-A115-A exceeds 200V (C = 200pF, R = 0Ω)\n\n? Multiple package options\n; The 74HC377?Q100; 74HCT377?Q100 is an octal positive?edge triggered D?type flip?flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW?to?HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW?to?HIGH transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n | NexperiaNexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | Nexperia | ||
Octal D-type flip-flop with data enable; positive-edge trigger 1.Generaldescription The74HC377-Q100;74HCT377-Q100isanoctalpositive-edgetriggeredD-typeflip-flop.The devicefeaturesclock(CP)anddataenable(E)inputs.WhenEisLOW,theoutputsQnassume thestateoftheircorrespondingDninputsthatmeettheset-upandholdtimerequirements | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | NEXPERIA | ||
Octal D-type flip-flop with data enable; positive-edge trigger | NEXPERIANexperia B.V. All rights reserved 安世安世半導(dǎo)體(中國)有限公司 | NEXPERIA | ||
Package:20-TSSOP(0.173",4.40mm 寬);包裝:卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶 功能:標準 類別:集成電路(IC) 觸發(fā)器 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP | Nexperia USA Inc. Nexperia USA Inc. | Nexperia USA Inc. | ||
Package:20-TSSOP(0.173",4.40mm 寬);包裝:卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶 功能:標準 類別:集成電路(IC) 觸發(fā)器 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP | Nexperia USA Inc. Nexperia USA Inc. | Nexperia USA Inc. | ||
Package:20-TSSOP(0.173",4.40mm 寬);包裝:卷帶(TR) 功能:標準 類別:集成電路(IC) 觸發(fā)器 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP | Nexperia USA Inc. Nexperia USA Inc. | Nexperia USA Inc. |
技術(shù)參數(shù)
- VCC (V):
2.0?-?6.0
- Logic switching levels:
CMOS
- Output drive capability (mA):
± 7.8
- tpd (ns):
13
- fmax (MHz):
83
- Power dissipation considerations:
low
- Tamb (°C):
-40~125
- Rth(j-a) (K/W):
97
- Ψth(j-top) (K/W):
3.7
- Rth(j-c) (K/W):
41.1
- Package name:
TSSOP20
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
恩XP |
24+ |
標準封裝 |
20888 |
全新原裝正品/價格優(yōu)惠/質(zhì)量保障 |
詢價 | ||
恩XP |
25+ |
TSSOP20 |
32360 |
NXP/恩智浦全新特價74HC377PW即刻詢購立享優(yōu)惠#長期有貨 |
詢價 | ||
恩XP |
1335+ |
TSSOP20 |
40 |
現(xiàn)貨庫存,有單來談 |
詢價 | ||
恩XP |
23+ |
TSSOP20 |
29600 |
一級分銷商! |
詢價 | ||
恩XP |
2021+ |
TSSSOP |
9000 |
原裝現(xiàn)貨,隨時歡迎詢價 |
詢價 | ||
恩XP |
24+/25+ |
1988 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 | |||
恩XP |
23+ |
TSSOP |
5000 |
原裝正品,假一罰十 |
詢價 | ||
恩XP |
2016+ |
TSSOP20 |
5075 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價 | ||
Nexperia/安世 |
22+ |
SOT360-1 |
56250 |
原廠原裝正品現(xiàn)貨 |
詢價 | ||
恩XP |
24+ |
TSSOP-20 |
66800 |
原廠授權(quán)一級代理,專注汽車、醫(yī)療、工業(yè)、新能源! |
詢價 |
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