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74HC259DB

8-bit addressable latch

GENERALDESCRIPTION The74HC/HCT259arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES ?Combinesdemultiplexerand8-bitlatch ?Serial-to-parallelcapability ?Outp

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74HC259DB

8-bit addressable latch

Generaldescription The74HC259;74HCT259arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithLow-powerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardNo.7-A.

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74HC259DB

74HC259DB - 8-bit addressable latch; ·Combined demultiplexer and 8-bit latch\n·Serial-to-parallel capability\n·Output from each storage bit available\n·Random (addressable) data entry\n·Easily expandable\n·Common reset input\n·Useful as a 3-to-8 active HIGH decoder\n·Complies with JEDEC standard no. 7A\n·Input levels: ·For 74HC259: CMOS level\n·For 74HCT259: TTL level\n;

8-bit addressable latch - The 74HC259; 74HCT259 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs AO to A3. The addressed latch will follow the data input, non-addressed latches will retain their previous states. In memory mode, all latches retain their previous states and are unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the D input and all other outputs are LOW. In the reset mode, all outputs are forced LOW and unaffected by the data or address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

74HC259DB

8-bit addressable latch

ETC

74HC259DB,112

Package：16-SSOP（0.209"，5.30mm 寬）；包裝：管件 類別：集成電路（IC） 鎖存器 描述：IC 8BIT ADDRESSABLE LATCH 16SSOP

ETC

74HC259DB,118

Package：16-SSOP（0.209"，5.30mm 寬）；包裝：管件 類別：集成電路（IC） 鎖存器 描述：IC 8BIT ADDRESSABLE LATCH 16SSOP

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