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74HC191DB

Presettable synchronous 4-bit binary up/down counter; ? Complies with JEDEC standard no. 7A\n? CMOS input levels\n? Synchronous reversible counting\n? Asynchronous parallel load\n? Count enable control for synchronous expansion\n? Single up/down control input\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74HC191 is an asynchronously presettable 4-bit binary up/down counter. It contains four master/slave flip-flops with internal gating and steering logic to provide asynchronous preset and synchronous count-up and count-down operation. Asynchronous parallel load capability permits the counter to be preset to any desired value. Information present on the parallel data inputs (D0 to D3) is loaded into the counter and appears on the outputs when the parallel load (PL) input is LOW. This operation overrides the counting function. Counting is inhibited by a HIGH level on the count enable (CE) input. When CE is LOW internal state changes are initiated synchronously by the LOW-to-HIGH transition of the clock input. The up/down (U/D) input signal determines the direction of counting as indicated in the function table. The CE input may go LOW when the clock is in either state, however, the LOW-to-HIGH CE transition must occur only when the clock is HIGH. Also, the U/D input should be changed only when either CE or CP is HIGH. Overflow/underflow indications are provided by two types of outputs, the terminal count (TC) and ripple clock (RC). The TC output is normally LOW and goes HIGH when a circuit reaches zero in the count-down mode or reaches '15' in the count-up-mode. The TC output will remain HIGH until a state change occurs, either by counting or presetting, or until U/D is changed. ....\n

74HC191DB

Presettable synchronous 4-bit binary up/down counter

GENERALDESCRIPTION The74HC/HCT191arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT191areasynchronouslypresettable4-bitbinaryup/downcounters.Theycontainfourmaster/

ETC

74HC191DB,112

Package：16-SSOP（0.209"，5.30mm 寬）；包裝：管件 類別：集成電路（IC） 計(jì)數(shù)器，除法器 描述：IC SYNC 4BIT BINARY UP/DN 16SSOP

ETC

74HC191DB,118

Package：16-SSOP（0.209"，5.30mm 寬）；包裝：管件 類別：集成電路（IC） 計(jì)數(shù)器，除法器 描述：IC 4BIT BINAR UP/DN COUNT 16SSOP

ETC

74HC191N

Presettablesynchronous4-bitbinaryup/downcounter

GENERALDESCRIPTION The74HC/HCT191arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT191areasynchronouslypresettable4-bitbinaryup/downcounters.Theycontainfourmaster/

ETC

74HC191PW

Presettablesynchronous4-bitbinaryup/downcounter

GENERALDESCRIPTION The74HC/HCT191arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. The74HC/HCT191areasynchronouslypresettable4-bitbinaryup/downcounters.Theycontainfourmaster/

ETC

74HC191PW

Presettablesynchronous4-bitbinaryup/downcounter

1.Generaldescription The74HC191isanasynchronouslypresettable4-bitbinaryup/downcounter.Itcontainsfour master/slaveflip-flopswithinternalgatingandsteeringlogictoprovideasynchronouspresetand synchronouscount-upandcount-downoperation.Asynchronousparallelloadcapabil

CD74HC191

SYNCHORONOUSUP/DOWNCOUNTERSWITHDOWN/UPMODECONTROL

CD74HC191

HIGHSPEEDCMOSLOGIC

CD74HC191

SYNCHRONOUSUP/DOWNCOUNTERSWITHDOWN/UPMODECONTROL