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74HC174D

Hex D-type flip-flop with reset; positive-edge trigger

GENERALDESCRIPTION The74HC/HCT174arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES ?Sixedge-triggeredD-typeflip-flops ?Asynchronousmasterreset ?Outputcap

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

74HC174D

Hex D-type flip-flop with reset; positive-edge trigger

1.Generaldescription The74HC174;74HCT174arehexpositiveedge-triggeredD-typeflip-flopswithindividualdata inputs(Dn)andoutputs(Qn).Thecommonclock(CP)andmasterreset(MR)inputsloadandreset allflip-flopssimultaneously.TheD-inputthatmeetstheset-upandholdtimerequ

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74HC174D

Hex D-type flip-flop with reset; positive-edge trigger; ? Input levels:? For 74HC174: CMOS level\n? For 74HCT174: TTL level\n\n? Six edge-triggered D-type flip-flops\n? Asynchronous master reset\n? Complies with JEDEC standard no. 7A\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V.\n\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C.\n;

The 74HC174; 74HCT174 are hex positive edge -triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR ) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n

NexperiaNexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74HC174D

74HC CMOS logic IC series; Power Dissipation PD 500 mW \n;

Function:Hex D-Type Flip-Flop with Clear\nNumber of Circuits:6\nRoHS Compatible Product(s) (#):Available\nAssembly bases:日本\n

ToshibaToshiba Semiconductor

東芝株式會社東芝

74HC174D

Package:16-SOIC(0.154",3.90mm 寬);包裝:管件 功能:主復(fù)位 類別:集成電路(IC) 觸發(fā)器 描述:IC FF D-TYPE SNGL 6BIT 16SOIC

Toshiba Semiconductor and Storage

Toshiba Semiconductor and Storage

Toshiba Semiconductor and Storage

74HC174DB

Hex D-type flip-flop with reset; positive-edge trigger

GENERALDESCRIPTION The74HC/HCT174arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A. FEATURES ?Sixedge-triggeredD-typeflip-flops ?Asynchronousmasterreset ?Outputcap

PhilipsPhilips Semiconductors

飛利浦荷蘭皇家飛利浦

74HC174D-Q100

Hex D-type flip-flop with reset; positive-edge trigger

1.Generaldescription The74HC174-Q100;74HCT174-Q100arehexpositiveedge-triggeredD-typeflip-flopswith individualdatainputs(Dn)andoutputs(Qn).Thecommonclock(CP)andmasterreset(MR) inputsloadandresetallflip-flopssimultaneously.TheD-inputthatmeetstheset-upandhold

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74HC174D-Q100

Hex D-type flip-flop with reset; positive-edge trigger; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Input levels:? For 74HC174-Q100: CMOS level\n? For 74HCT174-Q100: TTL level\n\n? Six edge-triggered D-type flip-flops\n? Asynchronous master reset\n? Complies with JEDEC standard no. 7A\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n? Multiple package options\n;

The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

NexperiaNexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74HC174D-Q100

Hex D-type flip-flop with reset; positive-edge trigger

NEXPERIANexperia B.V. All rights reserved

安世安世半導(dǎo)體(中國)有限公司

74HC174D,653

Package:16-SOIC(0.154",3.90mm 寬);包裝:管件 功能:主復(fù)位 類別:集成電路(IC) 觸發(fā)器 描述:IC FF D-TYPE SNGL 6BIT 16SO

Nexperia USA Inc.

Nexperia USA Inc.

Nexperia USA Inc.

產(chǎn)品屬性

  • 產(chǎn)品編號:

    74HC174D

  • 制造商:

    Toshiba Semiconductor and Storage

  • 類別:

    集成電路(IC) > 觸發(fā)器

  • 系列:

    74HC

  • 包裝:

    管件

  • 功能:

    主復(fù)位

  • 類型:

    D 型

  • 輸出類型:

    非反相

  • 不同 V、最大 CL 時最大傳播延遲:

    26ns @ 6V,50pF

  • 觸發(fā)器類型:

    正邊沿

  • 電流 - 輸出高、低:

    5.2mA,5.2mA

  • 電壓 - 供電:

    2V ~ 6V

  • 工作溫度:

    -40°C ~ 85°C(TA)

  • 安裝類型:

    表面貼裝型

  • 供應(yīng)商器件封裝:

    16-SOIC

  • 封裝/外殼:

    16-SOIC(0.154",3.90mm 寬)

  • 描述:

    IC FF D-TYPE SNGL 6BIT 16SOIC

供應(yīng)商型號品牌批號封裝庫存備注價格
Nexperia/安世
24+
SOP-16-44
20524
原裝正品,現(xiàn)貨庫存,1小時內(nèi)發(fā)貨
詢價
NEXPERIA/安世
25+
SOT109-1
600000
NEXPERIA/安世全新特價74HC174D即刻詢購立享優(yōu)惠#長期有排單訂
詢價
NEXPERIA/安世
21+
SO16
8080
只做原裝,質(zhì)量保證
詢價
NEXPERIA
25+
SOP-16-44
6000
全新原裝現(xiàn)貨、誠信經(jīng)營!
詢價
PHI
2021+
SOP16
9000
原裝現(xiàn)貨,隨時歡迎詢價
詢價
PHI
2024
SOP-16
13500
16余年資質(zhì) 絕對原盒原盤代理渠道 更多數(shù)量
詢價
Nexperia/安世
24+
SOP-16-44
5000
進口原裝 價格優(yōu)勢
詢價
恩XP
2406+
SOP
2591
優(yōu)勢代理渠道,原裝現(xiàn)貨,可全系列訂貨
詢價
NEXPERIA
22+
原廠
32000
詢價
恩XP
SOP
220
原裝現(xiàn)貨
詢價
更多74HC174D供應(yīng)商 更新時間2025-7-28 23:00:00