74HC164PW-Q100屬于集成電路（IC）的移位寄存器。由安世半導(dǎo)體(中國)有限公司制造生產(chǎn)的74HC164PW-Q100移位寄存器移位寄存器是低級邏輯器件，通常用于在串行和并行方式之間轉(zhuǎn)換數(shù)字邏輯信號形式的數(shù)據(jù)，或在數(shù)字字內(nèi)移動數(shù)據(jù)位的位置。移位寄存器通常使用集成到一個設(shè)備中的一組觸發(fā)器來實現(xiàn)，常用于集成度更高的邏輯器件，但仍可用于 I/O 擴展等應(yīng)用，在這些應(yīng)用中離散形式的函數(shù)可能會非常有用。

General description

The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)

? Specified from -40 °C to +85 °C and from -40 °C to +125 °C

? Wide supply voltage range from 2.0 to 6.0 V

? CMOS low power dissipation

? High noise immunity

? Input levels:

? For 74HC164-Q100: CMOS level

? For 74HCT164-Q100: TTL level

? Gated serial data inputs

? Asynchronous master reset

? Complies with JEDEC standards

? JESD8C (2.7 V to 3.6 V)

? JESD7A (2.0 V to 6.0 V)

? Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

? ESD protection:

? MIL-STD-883, method 3015 exceeds 2000 V

? HBM JESD22-A114F exceeds 2000 V

? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

? Multiple package options

? DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints