74F74PCX中文資料仙童半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

廠商型號(hào) |
74F74PCX |
功能描述 | Dual D-Type Positive Edge-Triggered Flip-Flop |
文件大小 |
74.78 Kbytes |
頁(yè)面數(shù)量 |
7 頁(yè) |
生產(chǎn)廠商 | Fairchild Semiconductor |
企業(yè)簡(jiǎn)稱 |
FAIRCHILD【仙童半導(dǎo)體】 |
中文名稱 | 飛兆/仙童半導(dǎo)體公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-2 23:00:00 |
人工找貨 | 74F74PCX價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
74F74PCX規(guī)格書(shū)詳情
General Description
The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.
Asynchronous Inputs:
LOW input to SD sets Q to HIGH level
LOW input to CD sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD
makes both Q and Q HIGH
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---|---|---|---|---|---|---|---|
onsemi(安森美) |
24+ |
SOP14 |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢價(jià) | ||
FAIRCHILD/仙童 |
24+ |
NA/ |
5400 |
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開(kāi)票 |
詢價(jià) | ||
NS/國(guó)半 |
25+ |
DIP14 |
58788 |
百分百原裝現(xiàn)貨 實(shí)單必成 歡迎詢價(jià) |
詢價(jià) | ||
FAIRCHILD/仙童 |
25+ |
SOP8 |
860000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
FAIRCHILD |
1129+ |
SOP-14 |
2050 |
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詢價(jià) | ||
Fsc |
23+ |
14-SOIC |
9526 |
詢價(jià) | |||
FAIRCHILD |
2016+ |
SOP-14 |
6523 |
房間原裝進(jìn)口現(xiàn)貨假一賠十 |
詢價(jià) | ||
NSC |
23+ |
NA |
21060 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
FSC |
25+ |
SOP |
3200 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售 |
詢價(jià) | ||
ON SEMI |
504 |
公司優(yōu)勢(shì)庫(kù)存 熱賣(mài)中! |
詢價(jià) |