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74AVCH4T245PW

絲印：CH4T245；Package：SOT403-1；4-bit dual supply translating transceiver with configurable voltage translation; 3-state

1.Generaldescription The74AVCH4T245isa4-bit,dualsupplytransceiverthatenablesbidirectionallevel translation.Thedevicecanbeusedastwo2-bittransceiversorasa4-bittransceiver.It featurestwo2-bitinput-outputports(nAnandnBn),adirectioncontrolinput(nDIR),a outpu

74AVCH4T245PW

4-bit dual supply translating transceiver with configurable voltage translation; 3-state; ? Wide supply voltage range: VCC(A):0.8Vto3.6V; VCC(B):0.8Vto3.6V\n? Complies with JEDEC standards:? JESD8-12 (0.8 V to 1.3 V)\n? JESD8-11 (0.9 V to 1.65 V)\n? JESD8-7 (1.2 V to 1.95 V)\n? JESD8-5 (1.8 V to 2.7 V)\n? JESD8-B (2.7 V to 3.6 V)\n\n? ESD protection:? HBM JESD22-A114E Class 3B exceeds 8000 V\n? MM JESD22-A115-A exceeds 200 V\n? CDM JESD22-C101C exceeds 1000 V\n\n? Maximum data rates:? 380 Mbit/s (≥ 1.8 V to 3.3 V translation)\n? 200 Mbit/s (≥ 1.1 V to 3.3 V translation)\n? 200 Mbit/s (≥ 1.1 V to 2.5 V translation)\n? 200 Mbit/s (≥ 1.1 V to 1.8 V translation)\n? 150 Mbit/s (≥ 1.1 V to 1.5 V translation)\n? 100 Mbit/s (≥ 1.1 V to 1.2 V translation)\n\n? Suspend mode\n? Bus hold on data inputs\n? Latch-up performance exceeds 100 mA per JESD 78 Class II\n? Inputs accept voltages up to 3.6 V\n? IOFF circuitry provides partial Power-down mode operation\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AVCH4T245 is a 4-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features two 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), an output enable input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.\n The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn outputs are in the high-impedance OFF-state. The bus hold circuitry on the powered-up side always stays active.\n The 74AVCH4T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.\n

74AVCH4T245PW-Q100

4-bit dual supply translating transceiver with configurable voltage translation; 3-state; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Wide supply voltage range:? VCC(A): 0.8 V to 3.6 V\n? VCC(B): 0.8 V to 3.6 V\n\n? Complies with JEDEC standards:? JESD8-12 (0.8 V to 1.3 V)\n? JESD8-11 (0.9 V to 1.65 V)\n? JESD8-7 (1.2 V to 1.95 V)\n? JESD8-5 (1.8 V to 2.7 V)\n? JESD8-B (2.7 V to 3.6 V)\n\n? ESD protection:? MIL-STD-883, method 3015 Class 3B exceeds 8000 V\n? HBM JESD22-A114E Class 3B exceeds 8000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)\n\n? Maximum data rates:? 380 Mbit/s (≥ 1.8 V to 3.3 V translation)\n? 200 Mbit/s (≥ 1.1 V to 3.3 V translation)\n? 200 Mbit/s (≥ 1.1 V to 2.5 V translation)\n? 200 Mbit/s (≥ 1.1 V to 1.8 V translation)\n? 150 Mbit/s (≥ 1.1 V to 1.5 V translation)\n? 100 Mbit/s (≥ 1.1 V to 1.2 V translation)\n\n? Suspend mode\n? Bus hold on data inputs\n? Latch-up performance exceeds 100 mA per JESD 78 Class II\n? Inputs accept voltages up to 3.6 V\n? IOFF circuitry provides partial Power-down mode operation\n? Multiple package options\n? DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints\n;

The 74AVCH4T245-Q100 is a 4-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features two 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), an output enable input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied with any voltage between 0.8 V and 3.6 V. This feature makes the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.\n The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn outputs are in the high-impedance OFF-state. The bus hold circuitry on the powered-up side always stays active.\n The 74AVCH4T245-Q100 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74AVCH4T245PWRG4

SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs

1Features ?ControlinputsVIH/VILlevelsarereferencedto VCCAvoltage ?Fullyconfigurabledual-raildesignallowseachport tooperateoverthefull1.2Vto3.6Vpower-supply range ?I/OsAre4.6VTolerant ?Ioffsupportspartialpower-down-modeoperation ?Busholdondatainputseli

74AVCH4T245PWTE4

SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs

1Features ?ControlinputsVIH/VILlevelsarereferencedto VCCAvoltage ?Fullyconfigurabledual-raildesignallowseachport tooperateoverthefull1.2Vto3.6Vpower-supply range ?I/OsAre4.6VTolerant ?Ioffsupportspartialpower-down-modeoperation ?Busholdondatainputseli

74AVCH4T245PWTG4

SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs

1Features ?ControlinputsVIH/VILlevelsarereferencedto VCCAvoltage ?Fullyconfigurabledual-raildesignallowseachport tooperateoverthefull1.2Vto3.6Vpower-supply range ?I/OsAre4.6VTolerant ?Ioffsupportspartialpower-down-modeoperation ?Busholdondatainputseli

74AVCH4T245PW-Q100

絲?。?a target="_blank" title="Marking" href="/ch4t245/marking.html">CH4T245；Package：TSSOP16；4-bit dual supply translating transceiver with configurable voltage translation 3-state

74AVCH4T245PWRE4

4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

74AVCH4T245PWRE4

4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

74AVCH4T245PWRE4

4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS