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74AUP2G04

Low-power dual inverter

1.Generaldescription The74AUP2G04isadualinverter.Schmitt-triggeractionatallinputsmakesthecircuittolerant ofslowerinputriseandfalltimes.Thisdeviceensuresverylowstaticanddynamicpower consumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceisfullys

74AUP2G04

DUAL INVERTER;

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.\n\n\t?\n\n\tThe 74AUP2G04 is composed of two inverters with standard pushpull outputs designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

74AUP2G04

Low-power dual inverter

ETC

74AUP2G04

Low-power dual inverter

PHI

74AUP2G04

DUAL INVERTERS

74AUP2G04GM

絲?。?a target="_blank" title="Marking" href="/p4/marking.html">p4；Package：SOT886；Low-power dual inverter

1.Generaldescription The74AUP2G04isadualinverter.Schmitt-triggeractionatallinputsmakesthecircuittolerant ofslowerinputriseandfalltimes.Thisdeviceensuresverylowstaticanddynamicpower consumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceisfullys

74AUP2G04GM

Low-power dual inverter; ? Wide supply voltage range from 0.8 V to 3.6 V\n? High noise immunity\n? Complies with JEDEC standards:? JESD8-12 (0.8 V to 1.3 V)\n? JESD8-11 (0.9 V to 1.65 V)\n? JESD8-7 (1.2 V to 1.95 V)\n? JESD8-5 (1.8 V to 2.7 V)\n? JESD8-B (2.7 V to 3.6 V)\n\n? ESD protection:? HBM JESD22-A114F Class 3A exceeds 5000 V\n? MM JESD22-A115-A exceeds 200 V\n? CDM JESD22-C101E exceeds 1000 V\n\n? Low static power consumption; ICC = 0.9 μA (maximum)\n? Latch-up performance exceeds 100 mA per JESD 78 Class II\n? Inputs accept voltages up to 3.6 V\n? Low noise overshoot and undershoot < 10 % of VCC\n? IOFF circuitry provides partial power-down mode operation\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AUP2G04 provides two inverting buffers.\n Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.\n This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n

74AUP2G04GN

Low-power dual inverter; ? Wide supply voltage range from 0.8 V to 3.6 V\n? High noise immunity\n? Complies with JEDEC standards:? JESD8-12 (0.8 V to 1.3 V)\n? JESD8-11 (0.9 V to 1.65 V)\n? JESD8-7 (1.2 V to 1.95 V)\n? JESD8-5 (1.8 V to 2.7 V)\n? JESD8-B (2.7 V to 3.6 V)\n\n? ESD protection:? HBM JESD22-A114F Class 3A exceeds 5000 V\n? MM JESD22-A115-A exceeds 200 V\n? CDM JESD22-C101E exceeds 1000 V\n\n? Low static power consumption; ICC = 0.9 μA (maximum)\n? Latch-up performance exceeds 100 mA per JESD 78 Class II\n? Inputs accept voltages up to 3.6 V\n? Low noise overshoot and undershoot < 10 % of VCC\n? IOFF circuitry provides partial power-down mode operation\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AUP2G04 provides two inverting buffers.\n Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.\n This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n

74AUP2G04GN

絲?。?a target="_blank" title="Marking" href="/p4/marking.html">p4；Package：SOT1115；Low-power dual inverter

1.Generaldescription The74AUP2G04isadualinverter.Schmitt-triggeractionatallinputsmakesthecircuittolerant ofslowerinputriseandfalltimes.Thisdeviceensuresverylowstaticanddynamicpower consumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceisfullys

74AUP2G04GS

絲?。?a target="_blank" title="Marking" href="/p4/marking.html">p4；Package：SOT1202；Low-power dual inverter

1.Generaldescription The74AUP2G04isadualinverter.Schmitt-triggeractionatallinputsmakesthecircuittolerant ofslowerinputriseandfalltimes.Thisdeviceensuresverylowstaticanddynamicpower consumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceisfullys