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74AUP1G34GX

絲?。?a target="_blank" title="Marking" href="/an/marking.html">AN；Package：SOT1226-3；Low-power buffer

1.Generaldescription The74AUP1G34isasinglebuffer.Schmitt-triggeractionatallinputsmakesthecircuittolerant ofslowerinputriseandfalltimes.Thisdeviceensuresverylowstaticanddynamicpower consumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceisfullys

74AUP1G34GX

Low-power buffer; ? Wide supply voltage range from 0.8 V to 3.6 V\n? High noise immunity\n? Complies with JEDEC standards:? JESD8-12 (0.8 V to 1.3 V)\n? JESD8-11 (0.9 V to 1.65 V)\n? JESD8-7 (1.2 V to 1.95 V)\n? JESD8-5 (1.8 V to 2.7 V)\n? JESD8-B (2.7 V to 3.6 V)\n\n? ESD protection:? HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 5000 V\n? CDM: ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V\n? MM: JESD22-A115-A exceeds 200 V\n\n? Low static power consumption; ICC = 0.9 μA (maximum)\n? Latch-up performance exceeds 100 mA per JESD 78 Class II\n? Inputs accept voltages up to 3.6 V\n? Low noise overshoot and undershoot < 10 % of VCC\n? IOFF circuitry provides partial power-down mode operation\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AUP1G34 provides a low-power, low-voltage single buffer.\n Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.\n This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n

74AUP1G34GX4

Low-power buffer; ? Wide supply voltage range from 0.8 V to 3.6 V\n? High noise immunity\n? Complies with JEDEC standards:? JESD8-12 (0.8 V to 1.3 V)\n? JESD8-11 (0.9 V to 1.65 V)\n? JESD8-7 (1.2 V to 1.95 V)\n? JESD8-5 (1.8 V to 2.7 V)\n? JESD8-B (2.7 V to 3.6 V)\n\n? ESD protection:? HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 5000 V\n? CDM: ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V\n? MM: JESD22-A115-A exceeds 200 V\n\n? Low static power consumption; ICC = 0.9 μA (maximum)\n? Latch-up performance exceeds 100 mA per JESD 78 Class II\n? Inputs accept voltages up to 3.6 V\n? Low noise overshoot and undershoot < 10 % of VCC\n? IOFF circuitry provides partial power-down mode operation\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C\n;

The 74AUP1G34 provides a low-power, low-voltage single buffer.\n Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.\n This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n

74AUP1G34GX4

絲印：AN；Package：SOT1269-2；Low-power buffer

1.Generaldescription The74AUP1G34isasinglebuffer.Schmitt-triggeractionatallinputsmakesthecircuittolerant ofslowerinputriseandfalltimes.Thisdeviceensuresverylowstaticanddynamicpower consumptionacrosstheentireVCCrangefrom0.8Vto3.6V.Thisdeviceisfullys

74AUP1G34GX,125

Package：4-XFDFN 裸露焊盤；包裝：卷帶（TR） 類別：集成電路（IC） 緩沖器，驅(qū)動器，接收器，收發(fā)器 描述：IC BUFFER NON-INVERT 3.6V 5X2SON

ETC

74AUP1G34GX4Z

Package：4-XFDFN；包裝：卷帶（TR） 類別：集成電路（IC） 緩沖器，驅(qū)動器，接收器，收發(fā)器 描述：IC BUFFER NON-INVERT 3.6V 4X2SON

ETC