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首頁>74ALVC162836A>規(guī)格書詳情

74ALVC162836A集成電路(IC)的通用總線功能規(guī)格書PDF中文資料

74ALVC162836A
廠商型號

74ALVC162836A

參數(shù)屬性

74ALVC162836A 封裝/外殼為56-TFSOP(0.240",6.10mm 寬);包裝為卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶;類別為集成電路(IC)的通用總線功能;產(chǎn)品描述:IC UNIV BUS DVR 20BIT 56TSSOP

功能描述

20-bit registered driver with inverted register enable and 30 Ω termination resistors; 3-state

封裝外殼

56-TFSOP(0.240",6.10mm 寬)

文件大小

204.75 Kbytes

頁面數(shù)量

15

生產(chǎn)廠商

NEXPERIA Nexperia B.V. All rights reserved

中文名稱

安世 安世半導(dǎo)體(中國)有限公司

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-8-12 23:01:00

人工找貨

74ALVC162836A價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

74ALVC162836A規(guī)格書詳情

1 General description

The 74ALVC162836A is a 20-bit universal bus driver. Data flow is controlled by output

enable (OE), latch enable (LE) and clock inputs (CP).

When LE is HIGH, the An to Yn data flow is transparent. When LE is HIGH and CP is

held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the Adata

is stored in the latch/flip-flop.

The 74ALVC162836A is designed with 30 Ω series resistors in both HIGH or LOW output

stages.

When OE is LOW the outputs are active. When OE is HIGH, the outputs go to the

high impedance OFF-state. Operation of the OE input does not affect the state of the

latch/flip-flop.

To ensure the high-impedance state during power up or power down, OE should be tied

to VCC through a pullup resistor; the minimum value of the resistor is determined by the

current-sinking capability of the driver.

2 Features and benefits

? Wide supply voltage range from 1.2 V to 3.6 V

? CMOS low-power consumption

? Direct interface with TTL levels

? Current drive ± 12 mA at 3.0 V

? MULTIBYTE flow-through standard pin-out architecture

? Low inductance multiple VCC and GND pins for minimum noise and ground bounce

? Output drive capability 50 Ω transmission lines at 85°C

? Integrated 30 Ω termination resistors

? Diode clamps to VCC and GND on all inputs

? Input diodes to accommodate strong drivers

? Complies with JEDEC standards:

– JESD8-5 (2.3 V to 2.7 V)

– JESD8B/JESD36 (2.7 V to 3.6 V)

? ESD protection:

– HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V

– CDM JESD22-C101E exceeds 1000 V

產(chǎn)品屬性

  • 產(chǎn)品編號:

    74ALVC162836ADGG

  • 制造商:

    Nexperia USA Inc.

  • 類別:

    集成電路(IC) > 通用總線功能

  • 系列:

    74ALVC

  • 包裝:

    卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶

  • 邏輯類型:

    通用總線驅(qū)動器

  • 電路數(shù):

    20 位

  • 電流 - 輸出高、低:

    12mA,12mA

  • 電壓 - 供電:

    1.2V ~ 3.6V

  • 工作溫度:

    -40°C ~ 85°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    56-TFSOP(0.240",6.10mm 寬)

  • 供應(yīng)商器件封裝:

    56-TSSOP

  • 描述:

    IC UNIV BUS DVR 20BIT 56TSSOP

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
PHI
24+
NA/
3603
原裝現(xiàn)貨,當(dāng)天可交貨,原型號開票
詢價
RENESAS(瑞薩)/IDT
24+
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
詢價
PHI
24+
TSSOP56
8000
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增
詢價
PHI
0038+0027+
TSSOP56
353
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力
詢價
恩XP
24+
TSSOP-14
30000
原裝正品公司現(xiàn)貨,假一賠十!
詢價
恩XP
23+
TSSOP-14
8080
正規(guī)渠道,只有原裝!
詢價
PHI
21+
TSSOP56
353
原裝現(xiàn)貨假一賠十
詢價
PHI
23+
TSSOP
12300
詢價
PHI
25+23+
TSSOP56
54888
絕對原裝正品現(xiàn)貨,全新深圳原裝進(jìn)口現(xiàn)貨
詢價
NEXPERIA/安世
25+
NA
860000
明嘉萊只做原裝正品現(xiàn)貨
詢價