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74ALVC162334A

16-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

DESCRIPTION The74ALVC162334Aisan16-bituniversalbusdriver. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?ComplieswithJEDECstandardno.8-1A. ?CMOSlowpowerconsumption ?DirectinterfacewithTTLlevels ?Currentdrive±24mAat3.0V ?MULTIBYTETMflow-through

PHI

74ALVC162334A

16-bit registered driver with inverted register enable and 30 W termination resistors (3-state)

Generaldescription The74ALVC162334Aisa16-bituniversalbusdriver. Features ■Widesupplyvoltagerangeof1.2Vto3.6V ■ComplieswithJEDECstandard8-1A ■CMOSlowpowerconsumption ■DirectinterfacewithTTLlevels ■Currentdrive:±24mAat3.0V ■MULTIBYTEflow-through

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74ALVC162334A

16-bit registered driver with inverted register enable and 30 Ω termination resistors (3-state)

1.Generaldescription The74ALVC162334Aisa16-bituniversalbusdriver.Dataflowiscontrolledby activeLOWoutputenable(OE),activeLOWlatchenable(LE),andclockinput(CP). WhenLEisLOW,theAtoYdataflowistransparent.WhenLEisHIGHandCPisheldat LOWorHIGH,thedata

74ALVC162334ADGG

16-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

DESCRIPTION The74ALVC162334Aisan16-bituniversalbusdriver. FEATURES ?Widesupplyvoltagerangeof1.2Vto3.6V ?ComplieswithJEDECstandardno.8-1A. ?CMOSlowpowerconsumption ?DirectinterfacewithTTLlevels ?Currentdrive±24mAat3.0V ?MULTIBYTETMflow-through

PHI

74ALVC162334ADGG

16-bit registered driver with inverted register enable and 30 W termination resistors (3-state)

Generaldescription The74ALVC162334Aisa16-bituniversalbusdriver. Features ■Widesupplyvoltagerangeof1.2Vto3.6V ■ComplieswithJEDECstandard8-1A ■CMOSlowpowerconsumption ■DirectinterfacewithTTLlevels ■Currentdrive:±24mAat3.0V ■MULTIBYTEflow-through

ETC

74ALVC162334ADGG

16-bit registered driver with inverted register enable and 30 Ω termination resistors (3-state)

1.Generaldescription The74ALVC162334Aisa16-bituniversalbusdriver.Dataflowiscontrolledby activeLOWoutputenable(OE),activeLOWlatchenable(LE),andclockinput(CP). WhenLEisLOW,theAtoYdataflowistransparent.WhenLEisHIGHandCPisheldat LOWorHIGH,thedata

74ALVC162334ADGG

16-bit registered driver with inverted register enable and 30 Ohm termination resistors (3-state); ? Wide supply voltage range of 1.2 V to 3.6 V\n? Complies with JEDEC standard 8-1A\n? CMOS low power consumption\n? Direct interface with TTL levels\n? Current drive: ±24 mA at 3.0 V\n? MULTIBYTE flow-through standard pinout architecture\n? Low inductance multiple VCC and GND pins for minimum noise and ground bounce\n? Output drive capability 50 Ω transmission lines at 85 °C\n? Integrated 30 Ω termination resistors\n? Input diodes to accommodate strong drivers\n;

The 74ALVC162334A is a 16-bit universal bus driver. Data flow is controlled by active LOW output enable (OE), active LOW latch enable (LE), and clock input (CP).\n When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP, the A data is stored in the latch/flip-flop.\n The 74ALVC162334A is designed with 30 Ω series resistors in both HIGH or LOW output stages.\n When OE is LOW, the outputs are active. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latch/flip-flop.\n To ensure the high-impedance state during power-up or power-down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.\n

74ALVC162334A_15

16-bit registered driver with inverted register enable and 30 W termination resistors (3-state)

PHI

74ALVC162334ADGG,1

Package：48-TFSOP（0.240"，6.10mm 寬）；包裝：管件 類別：集成電路（IC） 通用總線功能 描述：IC UNIV BUS DVR 16BIT 48TSSOP

ETC

74ALVC162334ADGG,5

Package：48-TFSOP（0.240"，6.10mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 通用總線功能 描述：IC UNIV BUS DVR 16BIT 48TSSOP

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