74ALS174D中文資料飛利浦數(shù)據(jù)手冊PDF規(guī)格書
74ALS174D規(guī)格書詳情
DESCRIPTION
The 74ALS174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output.
All Q outputs will be forced Low independent of clock or data inputs by a Low voltage level on the MR input. The device is useful for applications where true outputs only are required, and the clock and master reset are common to all storage elements.
FEATURES
? Four edge-triggered D flip-flops
? Buffered common clock
? Buffered asynchronous master reset
| 供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
TI/德州儀器 |
24+ |
NA/ |
4750 |
原裝現(xiàn)貨,當天可交貨,原型號開票 |
詢價 | ||
NS |
23+ |
DIP-16 |
20000 |
全新原裝假一賠十 |
詢價 | ||
NAT |
24+/25+ |
720 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 | |||
TI |
25+ |
sop |
3200 |
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售 |
詢價 | ||
ti |
24+ |
N/A |
6980 |
原裝現(xiàn)貨,可開13%稅票 |
詢價 | ||
MITSUBISH |
NA |
8560 |
一級代理 原裝正品假一罰十價格優(yōu)勢長期供貨 |
詢價 | |||
SIGN |
23+ |
NA |
9856 |
原裝正品,假一罰百! |
詢價 | ||
FAI |
24+ |
SMD |
20000 |
一級代理原裝現(xiàn)貨假一罰十 |
詢價 | ||
TI/德州儀器 |
22+ |
SOP3.9 |
8000 |
原裝正品支持實單 |
詢價 | ||
TI |
24+ |
SOP3.9 |
2987 |
只售原裝自家現(xiàn)貨!誠信經(jīng)營!歡迎來電! |
詢價 |
