74ACT16651DL屬于集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的74ACT16651DL緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。

Members of the Texas Instruments

WidebusE Family

Inputs Are TTL-Voltage Compatible

Inverting Data Paths

Independent Registers and Enables for

A and B Buses

Multiplexed Real-Time and Stored Data

Flow-Through Architecture Optimizes

PCB Layout

Distributed VCC and GND Pin

Configurations Minimize High-Speed

Switching Noise

EPICE (Enhanced-Performance Implanted

CMOS) 1-mm Process

500-mA Typical Latch-Up Immunity at

125°C

Packaged in Plastic 300-mil Shrink

Small-Outline (DL) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Packages

Using 25-mil Center-to-Center Pin Spacings

description

The SN54ACT16651 and 74ACT16651 are 16-bit

bus transceivers that consist of D-type flip-flops

and control circuitry arranged for multiplexed

transmission of data directly from the data bus or

from the internal storage registers. These devices

can be used as two 8-bit transceivers or one 16-bit

transceiver.

Complementary output-enable (OEAB and

OEBA) inputs are provided to control the

transceiver functions. Select-control (SAB and

SBA) inputs are provided to select whether

real-time or stored data is transferred. A low input

level selects real-time data, and a high input level

selects stored data. The circuitry used for select

control eliminates the typical decoding glitch that

occurs in a multiplexer during the transition

between stored and real-time data. Figure 1

illustrates the four fundamental bus-management

functions that can be performed with the

SN54ACT16651 and 74ACT16651.